Date: Fri, 11 Dec 2015 08:38:07 -0800 From: Adrian Chadd <adrian.chadd@gmail.com> To: Stanislav Galabov <sgalabov@gmail.com> Cc: "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: Re: MIPS_CONFIG0_VI defined wrong in sys/mips/include/cpuregs.h? Message-ID: <CAJ-VmokUfu=ha8xjVWSKj1Bx7eE7ir2KzMB=HDu7rZ_ekkHXug@mail.gmail.com> In-Reply-To: <7514D462-9B7F-4728-8784-135614215992@gmail.com> References: <7514D462-9B7F-4728-8784-135614215992@gmail.com>
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Hm, Would you file a freebsd pr about it? I'll go take a look at it and fix it = up. I'll go review the more recent mips core docs and see what's going on too. Thanks! -a On 11 December 2015 at 08:02, Stanislav Galabov <sgalabov@gmail.com> wrote: > Hi all, > > It seems that MIPS_CONFIG0_VI is defined wrong in sys/mips/include/cpureg= s.h. > > According to MIPS=C2=AE Architecture For Programmers Volume III, page 149= , Figure 9-29 (Config Register Format), accessed via http://www.t-es-t.hu/d= ownload/mips/md00090c.pdf, bit 3 of config0 is supposed to be VI (Virtual I= nstruction Cache), while the current definition of MIPS_CONFIG0_VI (0x00000= 004) implies that it=E2=80=99s bit 2. > > This leads to a lot of headaches when trying to bring up a new CPU (1004K= C in my case) and trying to use Cachable-Coherent CCA (0x5 or 0b101) for Ks= eg0 :-) > I guess we=E2=80=99ve been able to get away with this so far due to mainl= y 2 things: > 1. CPUs that use CCA 0x4 - 0x7 for Kseg0 usually are cache-coherent anywa= y, so their cache ops are most likely no-op. > 2. CPUs that use CCA 0x0 - 0x3 for Kseg0 work just fine, as bit 2 is not = set :-) > > This leads to improper detection of the I-Cache type (it=E2=80=99s detect= ed as virtual when it actually isn=E2=80=99t) on kernels that use CCA >=3D = 0x4 for Kseg0, which, in turn, leads to a lot of fun trying to figure out w= hat=E2=80=99s wrong and why things work with CCA 0x3 and not with 0x5 on a = single core... > After changing the definition of MIPS_CONFIG0_VI from 0x00000004 to 0x000= 00008 everything goes back to normal even with CCA 0x5. > > I would appreciate it if someone would commit this change (if you guys th= ink it=E2=80=99s necessary). I would do it myself if I but I have no commit= privileges. > > Best wishes, > Stanislav > _______________________________________________ > freebsd-mips@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-mips > To unsubscribe, send any mail to "freebsd-mips-unsubscribe@freebsd.org"
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