Date: Wed, 10 Sep 2008 09:17:09 +1000 From: Benno Rice <benno@jeamland.net> To: Jacques Fourie <jacques.fourie@gmail.com> Cc: freebsd-arm@freebsd.org Subject: Re: Routing benchmarks Message-ID: <200B1D7A-5D33-4E0F-A0C3-7F1C21FCF324@jeamland.net> In-Reply-To: <be2f52430809090816v57c2c80u6a48446b1e875361@mail.gmail.com> References: <be2f52430809090633o7b80f23y2749a055f61d5cb0@mail.gmail.com> <20080909175556.07bac5f0.stas@FreeBSD.org> <be2f52430809090736v4ab9c87bu2a0adced13811801@mail.gmail.com> <48C6900C.8070708@freebsd.org> <be2f52430809090816v57c2c80u6a48446b1e875361@mail.gmail.com>
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On 10/09/2008, at 1:16 AM, Jacques Fourie wrote: [snip] > Thanks for the nice idea - will try something similar. At the moment > I'm also suspecting that cache handling has got a lot to do with the > performance figures that I'm seeing. The PXA255 has a 32KB data and > 32KB instruction cache. As the author of the pxa, smc and related code, I can also attest to the fact that they could do with work. In particular, I always seemed to get what I thought were oddly high interrupt rates coming off the smc interfaces. This would be tying the CPU up in the interrupt/gpio- as-interrupt code and slowing things down. -- Benno Rice benno@jeamland.net
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