Date: Wed, 5 Dec 2007 01:58:48 -0600 (CST) From: Mike Silbersack <silby@silby.com> To: Joseph Koshy <jkoshy@FreeBSD.org> Cc: Kip Macy <kip.macy@gmail.com>, src-committers@freebsd.org, cvs-all@freebsd.org, cvs-src@freebsd.org Subject: Re: cvs commit: src/sys/dev/hwpmc hwpmc_x86.c Message-ID: <20071205015603.S12467@odysseus.silby.com> In-Reply-To: <86prxm5ksk.wl%koshy@unixconsulting.co.in> References: <200712031050.lB3AowcL055057@repoman.freebsd.org> <b1fa29170712031021j3cad6f4bq179d6312f6c791a6@mail.gmail.com> <86prxm5ksk.wl%koshy@unixconsulting.co.in>
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On Wed, 5 Dec 2007, Joseph Koshy wrote: > km> Can you say a little more about what the differences are or where one > km> could find a discussion of them without wading through different > km> processor model revisions? Kris, SCC, and I have been obtaining > km> sensible results using 0xE and 0xF for the small set of sampling > km> operations that we use. > <detail trimmed> > So in short, although Core/Core2 PMCs overlap the functionality of > the P6 PMCs they are not 100% backward compatible with them. > > Regards, > Koshy Based on the encyclopedic knowledge you recited above, it sounds like it should take you five minutes to type in the necessary code to allow Core / Core 2 processors to work with the minimal set of registers that we already know to work. Please do that - these are extremely mainstream processors that everyone expects us to have support (even if it's not complete) for. -Mike
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