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Date:      Fri, 19 Mar 1999 13:15:03 -0500 (EST)
From:      Andrew Gallatin <gallatin@cs.duke.edu>
To:        Matthew Dillon <dillon@apollo.backplane.com>
Cc:        Bill Paul <wpaul@skynet.ctr.columbia.edu>, hackers@FreeBSD.ORG
Subject:   Re: Gigabit ethernet revisited
Message-ID:  <14066.37142.414291.953962@grasshopper.cs.duke.edu>
In-Reply-To: <199903191739.JAA59302@apollo.backplane.com>
References:  <199903191415.JAA03718@skynet.ctr.columbia.edu> <199903191739.JAA59302@apollo.backplane.com>

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Matthew Dillon writes:

 >     Hmm.  I definitely think there's a bug due to not repopulating buffers
 >     from inside your receive interrupt packet processing loop, but it may
 >     not be the cause of this bug. 

Insufficient Rx buffer descriptors isn't the cause of this.  If it
were, we'd be seeing the firmware complaining about nicNoMoreRxBDs,
rather than nicDmaWriteRingFull.


 >     If the NIC is unable to complete DMA quickly enough, perhaps the burst
 >     parameters can be tweaked.  The PC certainly should be able to do DMA
 >     writes to memory at the PCI bus speed!  

I agree that the pci tuning parameters are the best candidates for
optimization.  

Drew
------------------------------------------------------------------------------
Andrew Gallatin, Sr Systems Programmer	http://www.cs.duke.edu/~gallatin
Duke University				Email: gallatin@cs.duke.edu
Department of Computer Science		Phone: (919) 660-6590




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