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Date:      Sun, 22 May 2011 22:19:09 +0200
From:      Damjan Marion <damjan.marion@gmail.com>
To:        Olivier Houchard <mlfbsd@ci0.org>
Cc:        freebsd-hackers@freebsd.org, freebsd-arm@freebsd.org
Subject:   Re: vm_fault when accessing PCI address space
Message-ID:  <C0C4DB5B-0835-45AE-9FC1-E026063281A8@gmail.com>
In-Reply-To: <20110522180422.GA46973@ci0.org>
References:  <D209676D-CDA8-4490-8965-86488C41D404@gmail.com> <20110522180422.GA46973@ci0.org>

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On May 22, 2011, at 8:04 PM, Olivier Houchard wrote:

> On Sat, May 21, 2011 at 01:34:02AM +0200, Damjan Marion wrote:
>>=20
>> Hi,
>>=20
>=20
> Hi Damjan,
>=20
>> I'm made some progress on porting existing marvell orion ARM code=20
>> to work on 88F5181L SoC which have embedded PCI controller.
>>=20
>> PCI driver detects resources and recognizes Atheros wlan card,=20
>> however when driver tries to access 1st register with
>> bus_space_write_4 vm_fault happens:
>>=20
>> vm_fault(0xc0e4f000, e8007000, 2, 0) -> 1
>> Fatal kernel mode data abort: 'Translation Fault (S)'
>> trapframe: 0xc0d3faa4
>> FSR=3D00000005, FAR=3De800704c, spsr=3D600000d3
>> r0 =3D00000000, r1 =3De8000000, r2 =3D0000704c, r3 =3D00000003
>> r4 =3Dc13cd000, r5 =3Dc0c4bd60, r6 =3Dc0bece04, r7 =3Dc12dd000
>> r8 =3D00000023, r9 =3Dc0d074c8, r10=3Dc0d3fba4, r11=3Dc0d3fb00
>> r12=3D00000000, ssp=3Dc0d3faf0, slr=3Dc095f830, pc =3Dc0bece04
>>=20
>> [ thread pid 0 tid 100000 ]
>> Stopped at      generic_bs_w_4: str     r3, [r1, r2]
>>=20
>> 0xe8000000 is PCI mem space. I can see that PCI driver (mv_pci.c) =
allocates this resource:
>>=20
>> pcib0: <Marvell Integrated PCI/PCI-E Controller> mem =
0xf1030000-0xf1031fff irq 0 on fdtbus0
>> pci0: <PCI bus> on pcib0
>> mv_pcib_alloc_resource: start=3D0xe8000000 end=3D0xe800ffff =
count=3D0x00010000 flags=3D0x00
>>=20
>> What can be the reason for this vm_fault?=20
>>=20
>=20
> I don't know the Marvell, nor the FDT code, well, but you shouldn't =
access
> to the PCI mem space using the physical address, so maybe something is =
missing
> from the dts ?
> Also, reading the mv code, there's this in mv_machdep.c :
> 	if (fdt_pci_devmap(child, &fdt_devmap[i],
> 			    MV_PCIE_IO_BASE, MV_PCIE_MEM_BASE) !=3D 0)
> 				return (ENXIO);
> but nothing equivalent for the PCI controller (as it seems the Orion =
has both
> PCI and PCIe). So maybe it is lacking ?

Hi Olivier,

yes, that code is wrong. It is inside loop so if there are 2 PCI =
adapters=20
(i.e. PCIe + PCI) it will try to map both to same VA.

Also different Marvell SoCs are using different PCI regions, so this =
needs to be adjusted to work with my SoC.

Thanks,

Damjan








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