Skip site navigation (1)Skip section navigation (2)
Date:      Thu, 7 Sep 2017 19:52:04 +0000 (UTC)
From:      Andrew Turner <andrew@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r323283 - head/sys/arm64/include
Message-ID:  <201709071952.v87Jq4UQ011805@repo.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: andrew
Date: Thu Sep  7 19:52:04 2017
New Revision: 323283
URL: https://svnweb.freebsd.org/changeset/base/323283

Log:
  Fix the SVE ID field shift.
  
  Sponsored by:	DARPA, AFRL

Modified:
  head/sys/arm64/include/armreg.h

Modified: head/sys/arm64/include/armreg.h
==============================================================================
--- head/sys/arm64/include/armreg.h	Thu Sep  7 19:51:17 2017	(r323282)
+++ head/sys/arm64/include/armreg.h	Thu Sep  7 19:52:04 2017	(r323283)
@@ -416,7 +416,7 @@
 #define	ID_AA64PFR0_RAS(x)		((x) & ID_AA64PFR0_RAS_MASK)
 #define	 ID_AA64PFR0_RAS_NONE		(0x0 << ID_AA64PFR0_RAS_SHIFT)
 #define	 ID_AA64PFR0_RAS_V1		(0x1 << ID_AA64PFR0_RAS_SHIFT)
-#define	ID_AA64PFR0_SVE_SHIFT		28
+#define	ID_AA64PFR0_SVE_SHIFT		32
 #define	ID_AA64PFR0_SVE_MASK		(0xful << ID_AA64PFR0_SVE_SHIFT)
 #define	ID_AA64PFR0_SVE(x)		((x) & ID_AA64PFR0_SVE_MASK)
 #define	 ID_AA64PFR0_SVE_NONE		(0x0ul << ID_AA64PFR0_SVE_SHIFT)



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201709071952.v87Jq4UQ011805>