Date: Mon, 11 Dec 2000 07:41:41 -0800 From: Michael Glenn Williams <michaelw@IPRG.nokia.com> To: Arun Sharma <arun@sharmas.dhs.org> Cc: Chuck Paterson <cp@bsdi.com>, smp@FreeBSD.ORG Subject: Re: Userland atomic assignments Message-ID: <3A34F5B4.10A27571@iprg.nokia.com> References: <200012091602.eB9G2UH06249@berserker.bsdi.com> <3A318757.4040108@sharmas.dhs.org>
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There are also sometimes issues if the assignment is to code. The interaction of the caches and the memory model in force can be hard to keep clear. Userland sharing memory locations between threads (same address space & cache footprint) or processes (shmem/mmap type stuff) have things like pagefaults of course, but won't fetch something partially written from memory. Even if an I/O device is updating the memory location this has to be preserved. Even if the architecture permits wierd alignments of "atomic sized writes" it has to enforce this. Moving to a relaxed memory model has been difficult because all the ABI and DDI/DKI type issues of coordination and backwards compatibility get in the way. If a new processor architecture came about that had reason to support SMP designs and no legacy drivers or application binaries, they could do an RMO. Mike Arun Sharma wrote: > Chuck Paterson wrote: > > > } > > }However, the complexity comes from memory ordering issues. All of x86 boxes > > }ensure sequential consistency. > > } > > > > Sequenctial consistency from a single processor, which may well > > be what you meant. > > Actually, what I wrote in my previous mail wasn't completely accurate > about sequential > consistency. (c == d) => (a == b) basically means writes happen in program > order as you say above. > > > Writes from different processors to different cache lines are not > > ordered with respect to one another. Also writes from one processor > > are not at all ordered with respect to reads from another processor. > > > > What is guaranteed is that writes from a single processor will be > > ordered with respect to one another as viewed from any processor. > > What sequential consistency guarantees is that writes as seen from > some other processor would make sense for _some_ arbitrary intermixing > of writes from other processors. > > A more formal definition: > > http://whatis.techtarget.com/WhatIs_Definition_Page/0,4152,212962,00.html > -Arun > > To Unsubscribe: send mail to majordomo@FreeBSD.org > with "unsubscribe freebsd-smp" in the body of the message To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message
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