Date: Wed, 12 Apr 2006 14:50:30 GMT From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 95068 for review Message-ID: <200604121450.k3CEoUJh071640@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=95068 Change 95068 by marcel@marcel_nfs on 2006/04/12 14:49:30 Replace the rmask and rval arrays with vendor, device, subvendor and subdevice variables. When subvendor is 0xffff, don't test the subvendor and subdevice values. This strips 24 bytes from the description. While here, sort the list on vendor, device, subvendor and subdevice. Affected files ... .. //depot/projects/uart/dev/puc/puc_pci.c#10 edit .. //depot/projects/uart/dev/puc/pucdata.c#20 edit .. //depot/projects/uart/dev/puc/pucvar.h#16 edit Differences ... ==== //depot/projects/uart/dev/puc/puc_pci.c#10 (text+ko) ==== @@ -85,42 +85,37 @@ int puc_config_win877(struct puc_softc *); static const struct puc_device_description * -puc_find_description(uint32_t vend, uint32_t prod, uint32_t svend, - uint32_t sprod) +puc_pci_match(device_t dev, const struct puc_device_description *desc) { - int i; + uint16_t device, subdev, subven, vendor; -#define checkreg(val, index) \ - (((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)]) - - for (i = 0; puc_devices[i].name != NULL; i++) { - if (checkreg(vend, PUC_REG_VEND) && - checkreg(prod, PUC_REG_PROD) && - checkreg(svend, PUC_REG_SVEND) && - checkreg(sprod, PUC_REG_SPROD)) - return (&puc_devices[i]); - } - -#undef checkreg - - return (NULL); + vendor = pci_get_vendor(dev); + device = pci_get_device(dev); + while (desc->vendor != 0xffff && + (desc->vendor != vendor || desc->device != device)) + desc++; + if (desc->vendor == 0xffff) + return (NULL); + if (desc->subvendor == 0xffff) + return (desc); + subven = pci_get_subvendor(dev); + subdev = pci_get_subdevice(dev); + while (desc->vendor == vendor && desc->device == device && + (desc->subvendor != subven || desc->subdevice != subdev)) + desc++; + return ((desc->vendor == vendor && desc->device == device) + ? desc : NULL); } static int puc_pci_probe(device_t dev) { - uint32_t v1, v2, d1, d2; const struct puc_device_description *desc; if ((pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) != 0) return (ENXIO); - v1 = pci_read_config(dev, PCIR_VENDOR, 2); - d1 = pci_read_config(dev, PCIR_DEVICE, 2); - v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2); - d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2); - - desc = puc_find_description(v1, d1, v2, d2); + desc = puc_pci_match(dev, puc_devices); if (desc == NULL) return (ENXIO); device_set_desc(dev, desc->name); @@ -130,13 +125,8 @@ static int puc_pci_attach(device_t dev) { - uint32_t v1, v2, d1, d2; - v1 = pci_read_config(dev, PCIR_VENDOR, 2); - d1 = pci_read_config(dev, PCIR_DEVICE, 2); - v2 = pci_read_config(dev, PCIR_SUBVEND_0, 2); - d2 = pci_read_config(dev, PCIR_SUBDEV_0, 2); - return (puc_attach(dev, puc_find_description(v1, d1, v2, d2))); + return (puc_attach(dev, puc_pci_match(dev, puc_devices))); } static device_method_t puc_pci_methods[] = { ==== //depot/projects/uart/dev/puc/pucdata.c#20 (text+ko) ==== @@ -42,16 +42,14 @@ #include <dev/pci/pcireg.h> #include <dev/pci/pcivar.h> -#include <dev/sio/sioreg.h> #include <dev/puc/pucvar.h> int puc_config_win877(struct puc_softc *); const struct puc_device_description puc_devices[] = { - { "Sunix SUN1889", - { 0x0009, 0x7168, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x0009, 0x7168, 0xffff, 0, + "Sunix SUN1889", DEFAULT_RCLK * 8, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -59,9 +57,8 @@ }, }, - { "Diva Serial [GSP] Multiport UART", - { 0x103c, 0x1048, 0x103c, 0x1282 }, - { 0xffff, 0xffff, 0xffff, 0xffff }, + { 0x103c, 0x1048, 0x103c, 0x1282, + "Diva Serial [GSP] Multiport UART", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -70,33 +67,95 @@ }, }, - { "Comtrol RocketPort 550/4 RJ45", - { 0x11fe, 0x8014, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x10b5, 0x1076, 0x10b5, 0x1076, + "VScom PCI-800", + DEFAULT_RCLK * 8, + { + { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x08 }, + { PUC_PORT_TYPE_COM, 0x18, 0x10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x18 }, + { PUC_PORT_TYPE_COM, 0x18, 0x20 }, + { PUC_PORT_TYPE_COM, 0x18, 0x28 }, + { PUC_PORT_TYPE_COM, 0x18, 0x30 }, + { PUC_PORT_TYPE_COM, 0x18, 0x38 }, + }, + }, + + { 0x10b5, 0x1077, 0x10b5, 0x1077, + "VScom PCI-400", + DEFAULT_RCLK * 8, + { + { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x08 }, + { PUC_PORT_TYPE_COM, 0x18, 0x10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x18 }, + }, + }, + + /* + * Boca Research Turbo Serial 658 (8 serial port) card. + * Appears to be the same as Chase Research PLC PCI-FAST8 + * and Perle PCI-FAST8 Multi-Port serial cards. + */ + { 0x10b5, 0x9050, 0x12e0, 0x0021, + "Boca Research Turbo Serial 658", DEFAULT_RCLK * 4, { - { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_COM, 0x10, 0x08 }, - { PUC_PORT_TYPE_COM, 0x10, 0x10 }, - { PUC_PORT_TYPE_COM, 0x10, 0x18 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x08 }, + { PUC_PORT_TYPE_COM, 0x18, 0x10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x18 }, + { PUC_PORT_TYPE_COM, 0x18, 0x20 }, + { PUC_PORT_TYPE_COM, 0x18, 0x28 }, + { PUC_PORT_TYPE_COM, 0x18, 0x30 }, + { PUC_PORT_TYPE_COM, 0x18, 0x38 }, }, }, - { "Comtrol RocketPort 550/Quad", - { 0x11fe, 0x8015, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x10b5, 0x9050, 0x12e0, 0x0031, + "Boca Research Turbo Serial 654", DEFAULT_RCLK * 4, { - { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_COM, 0x10, 0x08 }, - { PUC_PORT_TYPE_COM, 0x10, 0x10 }, - { PUC_PORT_TYPE_COM, 0x10, 0x18 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x08 }, + { PUC_PORT_TYPE_COM, 0x18, 0x10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x18 }, + }, + }, + + /* + * Dolphin Peripherals 4035 (dual serial port) card. PLX 9050, with + * a seemingly-lame EEPROM setup that puts the Dolphin IDs + * into the subsystem fields, and claims that it's a + * network/misc (0x02/0x80) device. + */ + { 0x10b5, 0x9050, 0xd84d, 0x6808, + "Dolphin Peripherals 4035", + DEFAULT_RCLK, + { + { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00 }, + }, + }, + + /* + * Dolphin Peripherals 4014 (dual parallel port) card. PLX 9050, with + * a seemingly-lame EEPROM setup that puts the Dolphin IDs + * into the subsystem fields, and claims that it's a + * network/misc (0x02/0x80) device. + */ + { 0x10b5, 0x9050, 0xd84d, 0x6810, + "Dolphin Peripherals 4014", + 0, + { + { PUC_PORT_TYPE_LPT, 0x20, 0x00 }, + { PUC_PORT_TYPE_LPT, 0x24, 0x00 }, }, }, - { "Comtrol RocketPort 550/8 RJ11 part A", - { 0x11fe, 0x8010, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x11fe, 0x8010, 0xffff, 0, + "Comtrol RocketPort 550/8 RJ11 part A", DEFAULT_RCLK * 4, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -105,9 +164,9 @@ { PUC_PORT_TYPE_COM, 0x10, 0x18 }, }, }, - { "Comtrol RocketPort 550/8 RJ11 part B", - { 0x11fe, 0x8011, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + + { 0x11fe, 0x8011, 0xffff, 0, + "Comtrol RocketPort 550/8 RJ11 part B", DEFAULT_RCLK * 4, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -117,9 +176,8 @@ }, }, - { "Comtrol RocketPort 550/8 Octa part A", - { 0x11fe, 0x8012, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x11fe, 0x8012, 0xffff, 0, + "Comtrol RocketPort 550/8 Octa part A", DEFAULT_RCLK * 4, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -128,9 +186,9 @@ { PUC_PORT_TYPE_COM, 0x10, 0x18 }, }, }, - { "Comtrol RocketPort 550/8 Octa part B", - { 0x11fe, 0x8013, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + + { 0x11fe, 0x8013, 0xffff, 0, + "Comtrol RocketPort 550/8 Octa part B", DEFAULT_RCLK * 4, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -140,9 +198,8 @@ }, }, - { "Comtrol RocketPort 550/8 part A", - { 0x11fe, 0x8018, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x11fe, 0x8014, 0xffff, 0, + "Comtrol RocketPort 550/4 RJ45", DEFAULT_RCLK * 4, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -151,9 +208,9 @@ { PUC_PORT_TYPE_COM, 0x10, 0x18 }, }, }, - { "Comtrol RocketPort 550/8 part B", - { 0x11fe, 0x8019, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + + { 0x11fe, 0x8015, 0xffff, 0, + "Comtrol RocketPort 550/Quad", DEFAULT_RCLK * 4, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -163,9 +220,8 @@ }, }, - { "Comtrol RocketPort 550/16 part A", - { 0x11fe, 0x8016, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x11fe, 0x8016, 0xffff, 0, + "Comtrol RocketPort 550/16 part A", DEFAULT_RCLK * 4, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -174,9 +230,9 @@ { PUC_PORT_TYPE_COM, 0x10, 0x18 }, }, }, - { "Comtrol RocketPort 550/16 part B", - { 0x11fe, 0x8017, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + + { 0x11fe, 0x8017, 0xffff, 0, + "Comtrol RocketPort 550/16 part B", DEFAULT_RCLK * 4, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -194,69 +250,29 @@ }, }, - /* - * XXX no entry because I have no data: - * XXX Dolphin Peripherals 4006 (single parallel) - */ - - /* - * Dolphin Peripherals 4014 (dual parallel port) card. PLX 9050, with - * a seemingly-lame EEPROM setup that puts the Dolphin IDs - * into the subsystem fields, and claims that it's a - * network/misc (0x02/0x80) device. - */ - { "Dolphin Peripherals 4014", - { 0x10b5, 0x9050, 0xd84d, 0x6810 }, - { 0xffff, 0xffff, 0xffff, 0xffff }, - 0, + { 0x11fe, 0x8018, 0xffff, 0, + "Comtrol RocketPort 550/8 part A", + DEFAULT_RCLK * 4, { - { PUC_PORT_TYPE_LPT, 0x20, 0x00 }, - { PUC_PORT_TYPE_LPT, 0x24, 0x00 }, + { PUC_PORT_TYPE_COM, 0x10, 0x00 }, + { PUC_PORT_TYPE_COM, 0x10, 0x08 }, + { PUC_PORT_TYPE_COM, 0x10, 0x10 }, + { PUC_PORT_TYPE_COM, 0x10, 0x18 }, }, }, - /* - * XXX Dolphin Peripherals 4025 (single serial) - * (clashes with Dolphin Peripherals 4036 (2s variant) - */ - - /* - * Dolphin Peripherals 4035 (dual serial port) card. PLX 9050, with - * a seemingly-lame EEPROM setup that puts the Dolphin IDs - * into the subsystem fields, and claims that it's a - * network/misc (0x02/0x80) device. - */ - { "Dolphin Peripherals 4035", - { 0x10b5, 0x9050, 0xd84d, 0x6808 }, - { 0xffff, 0xffff, 0xffff, 0xffff }, - DEFAULT_RCLK, + { 0x11fe, 0x8019, 0xffff, 0, + "Comtrol RocketPort 550/8 part B", + DEFAULT_RCLK * 4, { - { PUC_PORT_TYPE_COM, 0x18, 0x00 }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00 }, - }, - }, - - /* - * Dolphin Peripherals 4036 (dual serial port) card. - * (Dolpin 4025 has the same ID but only one port) - */ - { "Dolphin Peripherals 4036", - { 0x1409, 0x7168, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, - DEFAULT_RCLK * 8, - { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, { PUC_PORT_TYPE_COM, 0x10, 0x08 }, + { PUC_PORT_TYPE_COM, 0x10, 0x10 }, + { PUC_PORT_TYPE_COM, 0x10, 0x18 }, }, }, /* - * XXX no entry because I have no data: - * XXX Dolphin Peripherals 4078 (dual serial and single parallel) - */ - - - /* * SIIG Boards. * * SIIG provides documentation for their boards at: @@ -266,14 +282,8 @@ * use in their documentation. */ - /* - * SIIG "10x" family boards. - */ - - /* SIIG Cyber I/O PCI 16C550 (10x family): 1S, 1P */ - { "SIIG Cyber I/O PCI 16C550 (10x family)", - { 0x131f, 0x1010, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1010, 0xffff, 0, + "SIIG Cyber I/O PCI 16C550 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -281,10 +291,8 @@ }, }, - /* SIIG Cyber I/O PCI 16C650 (10x family): 1S, 1P */ - { "SIIG Cyber I/O PCI 16C650 (10x family)", - { 0x131f, 0x1011, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1011, 0xffff, 0, + "SIIG Cyber I/O PCI 16C650 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -292,10 +300,8 @@ }, }, - /* SIIG Cyber I/O PCI 16C850 (10x family): 1S, 1P */ - { "SIIG Cyber I/O PCI 16C850 (10x family)", - { 0x131f, 0x1012, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1012, 0xffff, 0, + "SIIG Cyber I/O PCI 16C850 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -303,20 +309,16 @@ }, }, - /* SIIG Cyber Parallel PCI (10x family): 1P */ - { "SIIG Cyber Parallel PCI (10x family)", - { 0x131f, 0x1020, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1020, 0xffff, 0, + "SIIG Cyber Parallel PCI (10x family)", 0, { { PUC_PORT_TYPE_LPT, 0x18, 0x00 }, }, }, - /* SIIG Cyber Parallel Dual PCI (10x family): 2P */ - { "SIIG Cyber Parallel Dual PCI (10x family)", - { 0x131f, 0x1021, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1021, 0xffff, 0, + "SIIG Cyber Parallel Dual PCI (10x family)", 0, { { PUC_PORT_TYPE_LPT, 0x18, 0x00 }, @@ -324,10 +326,8 @@ }, }, - /* SIIG Cyber Serial Dual PCI 16C550 (10x family): 2S */ - { "SIIG Cyber Serial Dual PCI 16C550 (10x family)", - { 0x131f, 0x1030, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1030, 0xffff, 0, + "SIIG Cyber Serial Dual PCI 16C550 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -335,10 +335,8 @@ }, }, - /* SIIG Cyber Serial Dual PCI 16C650 (10x family): 2S */ - { "SIIG Cyber Serial Dual PCI 16C650 (10x family)", - { 0x131f, 0x1031, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1031, 0xffff, 0, + "SIIG Cyber Serial Dual PCI 16C650 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -346,10 +344,8 @@ }, }, - /* SIIG Cyber Serial Dual PCI 16C850 (10x family): 2S */ - { "SIIG Cyber Serial Dual PCI 16C850 (10x family)", - { 0x131f, 0x1032, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1032, 0xffff, 0, + "SIIG Cyber Serial Dual PCI 16C850 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -357,10 +353,8 @@ }, }, - /* SIIG Cyber 2S1P PCI 16C550 (10x family): 2S, 1P */ - { "SIIG Cyber 2S1P PCI 16C550 (10x family)", - { 0x131f, 0x1034, 0, 0 }, /* XXX really? */ - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1034, 0xffff, 0, /* XXX really? */ + "SIIG Cyber 2S1P PCI 16C550 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -369,10 +363,8 @@ }, }, - /* SIIG Cyber 2S1P PCI 16C650 (10x family): 2S, 1P */ - { "SIIG Cyber 2S1P PCI 16C650 (10x family)", - { 0x131f, 0x1035, 0, 0 }, /* XXX really? */ - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1035, 0xffff, 0, /* XXX really? */ + "SIIG Cyber 2S1P PCI 16C650 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -381,10 +373,8 @@ }, }, - /* SIIG Cyber 2S1P PCI 16C850 (10x family): 2S, 1P */ - { "SIIG Cyber 2S1P PCI 16C850 (10x family)", - { 0x131f, 0x1036, 0, 0 }, /* XXX really? */ - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1036, 0xffff, 0, /* XXX really? */ + "SIIG Cyber 2S1P PCI 16C850 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -393,10 +383,8 @@ }, }, - /* SIIG Cyber 4S PCI 16C550 (10x family): 4S */ - { "SIIG Cyber 4S PCI 16C550 (10x family)", - { 0x131f, 0x1050, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1050, 0xffff, 0, + "SIIG Cyber 4S PCI 16C550 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -406,10 +394,8 @@ }, }, - /* SIIG Cyber 4S PCI 16C650 (10x family): 4S */ - { "SIIG Cyber 4S PCI 16C650 (10x family)", - { 0x131f, 0x1051, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1051, 0xffff, 0, + "SIIG Cyber 4S PCI 16C650 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -419,10 +405,8 @@ }, }, - /* SIIG Cyber 4S PCI 16C850 (10x family): 4S */ - { "SIIG Cyber 4S PCI 16C850 (10x family)", - { 0x131f, 0x1052, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x1052, 0xffff, 0, + "SIIG Cyber 4S PCI 16C850 (10x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -432,24 +416,43 @@ }, }, - /* - * SIIG "20x" family boards. - */ + { 0x131f, 0x2010, 0xffff, 0, + "SIIG Cyber I/O PCI 16C550 (20x family)", + DEFAULT_RCLK, + { + { PUC_PORT_TYPE_COM, 0x10, 0x00 }, + { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, + }, + }, + + { 0x131f, 0x2011, 0xffff, 0, + "SIIG Cyber I/O PCI 16C650 (20x family)", + DEFAULT_RCLK, + { + { PUC_PORT_TYPE_COM, 0x10, 0x00 }, + { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, + }, + }, + + { 0x131f, 0x2012, 0xffff, 0, + "SIIG Cyber I/O PCI 16C850 (20x family)", + DEFAULT_RCLK, + { + { PUC_PORT_TYPE_COM, 0x10, 0x00 }, + { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, + }, + }, - /* SIIG Cyber Parallel PCI (20x family): 1P */ - { "SIIG Cyber Parallel PCI (20x family)", - { 0x131f, 0x2020, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2020, 0xffff, 0, + "SIIG Cyber Parallel PCI (20x family)", 0, { { PUC_PORT_TYPE_LPT, 0x10, 0x00 }, }, }, - /* SIIG Cyber Parallel Dual PCI (20x family): 2P */ - { "SIIG Cyber Parallel Dual PCI (20x family)", - { 0x131f, 0x2021, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2021, 0xffff, 0, + "SIIG Cyber Parallel Dual PCI (20x family)", 0, { { PUC_PORT_TYPE_LPT, 0x10, 0x00 }, @@ -457,112 +460,98 @@ }, }, - /* SIIG Cyber 2P1S PCI 16C550 (20x family): 1S, 2P */ - { "SIIG Cyber 2P1S PCI 16C550 (20x family)", - { 0x131f, 0x2040, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2030, 0xffff, 0, + "SIIG Cyber Serial Dual PCI 16C550 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, - { PUC_PORT_TYPE_LPT, 0x1c, 0x00 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00 }, }, }, - /* SIIG Cyber 2P1S PCI 16C650 (20x family): 1S, 2P */ - { "SIIG Cyber 2P1S PCI 16C650 (20x family)", - { 0x131f, 0x2041, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2031, 0xffff, 0, + "SIIG Cyber Serial Dual PCI 16C650 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, - { PUC_PORT_TYPE_LPT, 0x1c, 0x00 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00 }, }, }, - /* SIIG Cyber 2P1S PCI 16C850 (20x family): 1S, 2P */ - { "SIIG Cyber 2P1S PCI 16C850 (20x family)", - { 0x131f, 0x2042, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2032, 0xffff, 0, + "SIIG Cyber Serial Dual PCI 16C850 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, - { PUC_PORT_TYPE_LPT, 0x1c, 0x00 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00 }, }, }, - /* SIIG Cyber I/O PCI 16C550 (20x family): 1S, 1P */ - { "SIIG Cyber I/O PCI 16C550 (20x family)", - { 0x131f, 0x2010, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2040, 0xffff, 0, + "SIIG Cyber 2P1S PCI 16C550 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, + { PUC_PORT_TYPE_LPT, 0x1c, 0x00 }, }, }, - /* SIIG Cyber I/O PCI 16C650 (20x family): 1S, 1P */ - { "SIIG Cyber I/O PCI 16C650 (20x family)", - { 0x131f, 0x2011, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2041, 0xffff, 0, + "SIIG Cyber 2P1S PCI 16C650 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, + { PUC_PORT_TYPE_LPT, 0x1c, 0x00 }, }, }, - /* SIIG Cyber I/O PCI 16C850 (20x family): 1S, 1P */ - { "SIIG Cyber I/O PCI 16C850 (20x family)", - { 0x131f, 0x2012, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2042, 0xffff, 0, + "SIIG Cyber 2P1S PCI 16C850 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00 }, + { PUC_PORT_TYPE_LPT, 0x1c, 0x00 }, }, }, - /* SIIG Cyber Serial Dual PCI 16C550 (20x family): 2S */ - { "SIIG Cyber Serial Dual PCI 16C550 (20x family)", - { 0x131f, 0x2030, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2050, 0xffff, 0, + "SIIG Cyber 4S PCI 16C550 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, { PUC_PORT_TYPE_COM, 0x14, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00 }, }, }, - /* SIIG Cyber Serial Dual PCI 16C650 (20x family): 2S */ - { "SIIG Cyber Serial Dual PCI 16C650 (20x family)", - { 0x131f, 0x2031, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2051, 0xffff, 0, + "SIIG Cyber 4S PCI 16C650 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, { PUC_PORT_TYPE_COM, 0x14, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00 }, }, }, - /* SIIG Cyber Serial Dual PCI 16C850 (20x family): 2S */ - { "SIIG Cyber Serial Dual PCI 16C850 (20x family)", - { 0x131f, 0x2032, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2052, 0xffff, 0, + "SIIG Cyber 4S PCI 16C850 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, { PUC_PORT_TYPE_COM, 0x14, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00 }, }, }, - /* SIIG Cyber 2S1P PCI 16C550 (20x family): 2S, 1P */ - { "SIIG Cyber 2S1P PCI 16C550 (20x family)", - { 0x131f, 0x2060, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2060, 0xffff, 0, + "SIIG Cyber 2S1P PCI 16C550 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -571,10 +560,8 @@ }, }, - /* SIIG Cyber 2S1P PCI 16C650 (20x family): 2S, 1P */ - { "SIIG Cyber 2S1P PCI 16C650 (20x family)", - { 0x131f, 0x2061, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2061, 0xffff, 0, + "SIIG Cyber 2S1P PCI 16C650 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -583,10 +570,8 @@ }, }, - /* SIIG Cyber 2S1P PCI 16C850 (20x family): 2S, 1P */ - { "SIIG Cyber 2S1P PCI 16C850 (20x family)", - { 0x131f, 0x2062, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x131f, 0x2062, 0xffff, 0, + "SIIG Cyber 2S1P PCI 16C850 (20x family)", DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, @@ -595,73 +580,56 @@ }, }, - /* SIIG Cyber 4S PCI 16C550 (20x family): 4S */ - { "SIIG Cyber 4S PCI 16C550 (20x family)", - { 0x131f, 0x2050, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, - DEFAULT_RCLK, + { 0x1393, 0x1040, 0xffff, 0, + "Moxa Technologies, Smartio C104H/PCI", + DEFAULT_RCLK * 8, { - { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_COM, 0x14, 0x00 }, { PUC_PORT_TYPE_COM, 0x18, 0x00 }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x08 }, + { PUC_PORT_TYPE_COM, 0x18, 0x10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x18 }, }, }, - /* SIIG Cyber 4S PCI 16C650 (20x family): 4S */ - { "SIIG Cyber 4S PCI 16C650 (20x family)", - { 0x131f, 0x2051, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, - DEFAULT_RCLK, + { 0x1393, 0x1041, 0xffff, 0, + "Moxa Technologies, Smartio CP-104UL/PCI", + DEFAULT_RCLK * 8, { - { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_COM, 0x14, 0x00 }, { PUC_PORT_TYPE_COM, 0x18, 0x00 }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x08 }, + { PUC_PORT_TYPE_COM, 0x18, 0x10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x18 }, }, }, - /* SIIG Cyber 4S PCI 16C850 (20x family): 4S */ - { "SIIG Cyber 4S PCI 16C850 (20x family)", - { 0x131f, 0x2052, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, - DEFAULT_RCLK, - { - { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_COM, 0x14, 0x00 }, - { PUC_PORT_TYPE_COM, 0x18, 0x00 }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00 }, - }, - }, - - /* VScom PCI-200L: 2S */ - { "VScom PCI-200L", - { 0x14d2, 0x8020, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1393, 0x1141, 0xffff, 0, + "Moxa Technologies, Industio CP-114", DEFAULT_RCLK * 8, { - { PUC_PORT_TYPE_COM, 0x14, 0x00 }, { PUC_PORT_TYPE_COM, 0x18, 0x00 }, + { PUC_PORT_TYPE_COM, 0x18, 0x08 }, + { PUC_PORT_TYPE_COM, 0x18, 0x10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x18 }, }, }, - /* VScom PCI-400: 4S */ - { "VScom PCI-400", - { 0x10b5, 0x1077, 0x10b5, 0x1077 }, - { 0xffff, 0xffff, 0xffff, 0xffff }, + { 0x1393, 0x1680, 0xffff, 0, + "Moxa Technologies, C168H/PCI", DEFAULT_RCLK * 8, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, { PUC_PORT_TYPE_COM, 0x18, 0x08 }, { PUC_PORT_TYPE_COM, 0x18, 0x10 }, { PUC_PORT_TYPE_COM, 0x18, 0x18 }, + { PUC_PORT_TYPE_COM, 0x18, 0x20 }, + { PUC_PORT_TYPE_COM, 0x18, 0x28 }, + { PUC_PORT_TYPE_COM, 0x18, 0x30 }, + { PUC_PORT_TYPE_COM, 0x18, 0x38 }, }, }, - /* VScom PCI-800: 8S */ - { "VScom PCI-800", - { 0x10b5, 0x1076, 0x10b5, 0x1076 }, - { 0xffff, 0xffff, 0xffff, 0xffff }, + { 0x1393, 0x1681, 0xffff, 0, + "Moxa Technologies, C168U/PCI", DEFAULT_RCLK * 8, { { PUC_PORT_TYPE_COM, 0x18, 0x00 }, @@ -674,122 +642,72 @@ { PUC_PORT_TYPE_COM, 0x18, 0x38 }, }, }, - /* - * VScom PCI-800H. Uses 8 16950 UART, behind a PCI chips that offers - * 4 com port on PCI device 0 and 4 on PCI device 1. PCI device 0 has - * device ID 3 and PCI device 1 device ID 4. - */ - { "Titan PCI-800H", - { 0x14d2, 0xa003, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + + { 0x13a8, 0x0158, 0xffff, 0, + "Cronyx Omega2-PCI", DEFAULT_RCLK * 8, { - { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_COM, 0x10, 0x08 }, - { PUC_PORT_TYPE_COM, 0x10, 0x10 }, - { PUC_PORT_TYPE_COM, 0x10, 0x18 }, + { PUC_PORT_TYPE_COM, 0x010, 0x000 }, + { PUC_PORT_TYPE_COM, 0x010, 0x200 }, + { PUC_PORT_TYPE_COM, 0x010, 0x400 }, + { PUC_PORT_TYPE_COM, 0x010, 0x600 }, + { PUC_PORT_TYPE_COM, 0x010, 0x800 }, + { PUC_PORT_TYPE_COM, 0x010, 0xA00 }, + { PUC_PORT_TYPE_COM, 0x010, 0xC00 }, + { PUC_PORT_TYPE_COM, 0x010, 0xE00 }, }, }, - { "Titan PCI-800H", - { 0x14d2, 0xa004, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, - DEFAULT_RCLK * 8, + + { 0x1407, 0x0100, 0xffff, 0, /* MASK */ + "Lava Computers dual serial port", + DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_COM, 0x10, 0x08 }, - { PUC_PORT_TYPE_COM, 0x10, 0x10 }, - { PUC_PORT_TYPE_COM, 0x10, 0x18 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00 }, }, }, - { "Titan PCI-200H", - { 0x14d2, 0xa005, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, - DEFAULT_RCLK * 8, + + { 0x1407, 0x0120, 0xffff, 0, /* MASK */ + "Lava Computers Quattro-PCI serial port", + DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, - { PUC_PORT_TYPE_COM, 0x10, 0x08 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00 }, }, }, - { "Titan VScom PCI-200HV2", /* 2S */ - { 0x14d2, 0xe020, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, - DEFAULT_RCLK * 8, + { 0x1407, 0x0180, 0xffff, 0, /* MASK */ + "Lava Computers Octopus-550 8-port serial", + DEFAULT_RCLK, { { PUC_PORT_TYPE_COM, 0x10, 0x00 }, { PUC_PORT_TYPE_COM, 0x14, 0x00 }, - }, - }, - /* - * VScom (Titan?) PCI-800L. More modern variant of the - * PCI-800. Uses 6 discrete 16550 UARTs, plus another >>> TRUNCATED FOR MAIL (1000 lines) <<<
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