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Date:      Thu, 30 May 2013 16:09:56 +0000 (UTC)
From:      Marius Strobl <marius@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r251142 - head/sys/dev/bce
Message-ID:  <201305301609.r4UG9u2O051398@svn.freebsd.org>

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Author: marius
Date: Thu May 30 16:09:56 2013
New Revision: 251142
URL: http://svnweb.freebsd.org/changeset/base/251142

Log:
  - As a follow-up to r247565, make firmware images that do not require
    patching at runtime actually const.
  - Remove pointless softc members by employing the corresponding constants
    directly.
  - Remove pointless returns.
  - Remove unnecessary inclusion of opt_device_polling.h.
  - Replace an outdated and now bogus comment in bce_tick() with the
    appropriate one.
  
  MFC after:	1 week

Modified:
  head/sys/dev/bce/if_bce.c
  head/sys/dev/bce/if_bcefw.h
  head/sys/dev/bce/if_bcereg.h

Modified: head/sys/dev/bce/if_bce.c
==============================================================================
--- head/sys/dev/bce/if_bce.c	Thu May 30 15:25:54 2013	(r251141)
+++ head/sys/dev/bce/if_bce.c	Thu May 30 16:09:56 2013	(r251142)
@@ -375,7 +375,8 @@ static void bce_release_resources	(struc
 /****************************************************************************/
 static void bce_fw_cap_init			(struct bce_softc *);
 static int  bce_fw_sync			(struct bce_softc *, u32);
-static void bce_load_rv2p_fw		(struct bce_softc *, u32 *, u32, u32);
+static void bce_load_rv2p_fw		(struct bce_softc *, const u32 *, u32,
+    u32);
 static void bce_load_cpu_fw		(struct bce_softc *,
     struct cpu_reg *, struct fw_info *);
 static void bce_start_cpu			(struct bce_softc *, struct cpu_reg *);
@@ -1019,7 +1020,6 @@ bce_set_tunables(struct bce_softc *sc)
 		sc->bce_tx_ticks = DEFAULT_TX_TICKS;
 		sc->bce_tx_quick_cons_trip = DEFAULT_TX_QUICK_CONS_TRIP;
 	}
-
 }
 
 
@@ -1332,23 +1332,6 @@ bce_attach(device_t dev)
 	/* Fetch the permanent Ethernet MAC address. */
 	bce_get_mac_addr(sc);
 
-	/*
-	 * Trip points control how many BDs
-	 * should be ready before generating an
-	 * interrupt while ticks control how long
-	 * a BD can sit in the chain before
-	 * generating an interrupt.  Set the default
-	 * values for the RX and TX chains.
-	 */
-
-	/* Not used for L2. */
-	sc->bce_comp_prod_trip_int     = 0;
-	sc->bce_comp_prod_trip         = 0;
-	sc->bce_com_ticks_int          = 0;
-	sc->bce_com_ticks              = 0;
-	sc->bce_cmd_ticks_int          = 0;
-	sc->bce_cmd_ticks              = 0;
-
 	/* Update statistics once every second. */
 	sc->bce_stats_ticks = 1000000 & 0xffff00;
 
@@ -1935,7 +1918,6 @@ bce_miibus_read_reg(device_t dev, int ph
 
 	DB_PRINT_PHY_REG(reg, val);
 	return (val & 0xffff);
-
 }
 
 
@@ -3037,7 +3019,6 @@ bce_get_rx_buffer_sizes(struct bce_softc
 			roundup2((MSIZE - MHLEN), 16) - (MSIZE - MHLEN);
 		sc->rx_bd_mbuf_data_len = sc->rx_bd_mbuf_alloc_size -
 			sc->rx_bd_mbuf_align_pad;
-		sc->pg_bd_mbuf_alloc_size = MCLBYTES;
 	} else {
 		if ((mtu + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +
 		    ETHER_CRC_LEN) > MCLBYTES) {
@@ -3067,7 +3048,6 @@ bce_get_rx_buffer_sizes(struct bce_softc
 	   sc->rx_bd_mbuf_align_pad);
 
 	DBEXIT(BCE_VERBOSE_LOAD);
-
 }
 
 /****************************************************************************/
@@ -3484,8 +3464,6 @@ bce_dma_map_addr(void *arg, bus_dma_segm
 	} else {
 		*busaddr = segs->ds_addr;
 	}
-
-	return;
 }
 
 
@@ -3793,21 +3771,17 @@ bce_dma_alloc(device_t dev)
 	 * Create a DMA tag for RX mbufs.
 	 */
 	if (bce_hdr_split == TRUE)
-		max_size = max_seg_size = ((sc->rx_bd_mbuf_alloc_size < MCLBYTES) ?
+		max_size = ((sc->rx_bd_mbuf_alloc_size < MCLBYTES) ?
 		    MCLBYTES : sc->rx_bd_mbuf_alloc_size);
 	else
-		max_size = max_seg_size = MJUM9BYTES;
-	max_segments = 1;
+		max_size = MJUM9BYTES;
 
 	DBPRINT(sc, BCE_INFO_LOAD, "%s(): Creating rx_mbuf_tag "
-	    "(max size = 0x%jX max segments = %d, max segment "
-	    "size = 0x%jX)\n", __FUNCTION__, (uintmax_t) max_size,
-	     max_segments, (uintmax_t) max_seg_size);
+	    "(max size = 0x%jX)\n", __FUNCTION__, (uintmax_t)max_size);
 
 	if (bus_dma_tag_create(sc->parent_tag, BCE_RX_BUF_ALIGN,
 	    BCE_DMA_BOUNDARY, sc->max_bus_addr, BUS_SPACE_MAXADDR, NULL, NULL,
-	    max_size, max_segments, max_seg_size, 0, NULL, NULL,
-	    &sc->rx_mbuf_tag)) {
+	    max_size, 1, max_size, 0, NULL, NULL, &sc->rx_mbuf_tag)) {
 		BCE_PRINTF("%s(%d): Could not allocate RX mbuf DMA tag!\n",
 		    __FILE__, __LINE__);
 		rc = ENOMEM;
@@ -3873,12 +3847,9 @@ bce_dma_alloc(device_t dev)
 		/*
 		 * Create a DMA tag for page mbufs.
 		 */
-		max_size = max_seg_size = ((sc->pg_bd_mbuf_alloc_size < MCLBYTES) ?
-			MCLBYTES : sc->pg_bd_mbuf_alloc_size);
-
 		if (bus_dma_tag_create(sc->parent_tag, 1, BCE_DMA_BOUNDARY,
-			sc->max_bus_addr, BUS_SPACE_MAXADDR, NULL, NULL,
-			max_size, 1, max_seg_size, 0, NULL, NULL, &sc->pg_mbuf_tag)) {
+		    sc->max_bus_addr, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
+		    1, MCLBYTES, 0, NULL, NULL, &sc->pg_mbuf_tag)) {
 			BCE_PRINTF("%s(%d): Could not allocate page mbuf "
 				"DMA tag!\n", __FILE__, __LINE__);
 			rc = ENOMEM;
@@ -4028,7 +3999,7 @@ bce_fw_sync_exit:
 /*   Nothing.                                                               */
 /****************************************************************************/
 static void
-bce_load_rv2p_fw(struct bce_softc *sc, u32 *rv2p_code,
+bce_load_rv2p_fw(struct bce_softc *sc, const u32 *rv2p_code,
 	u32 rv2p_code_len, u32 rv2p_proc)
 {
 	int i;
@@ -5244,24 +5215,28 @@ bce_blockinit(struct bce_softc *sc)
 	REG_WR(sc, BCE_HC_STATISTICS_ADDR_H,
 	    BCE_ADDR_HI(sc->stats_block_paddr));
 
-	/* Program various host coalescing parameters. */
+	/*
+	 * Program various host coalescing parameters.
+	 * Trip points control how many BDs should be ready before generating
+	 * an interrupt while ticks control how long a BD can sit in the chain
+	 * before generating an interrupt.
+	 */
 	REG_WR(sc, BCE_HC_TX_QUICK_CONS_TRIP,
-	    (sc->bce_tx_quick_cons_trip_int << 16) | sc->bce_tx_quick_cons_trip);
+	    (sc->bce_tx_quick_cons_trip_int << 16) |
+	    sc->bce_tx_quick_cons_trip);
 	REG_WR(sc, BCE_HC_RX_QUICK_CONS_TRIP,
-	    (sc->bce_rx_quick_cons_trip_int << 16) | sc->bce_rx_quick_cons_trip);
-	REG_WR(sc, BCE_HC_COMP_PROD_TRIP,
-	    (sc->bce_comp_prod_trip_int << 16) | sc->bce_comp_prod_trip);
+	    (sc->bce_rx_quick_cons_trip_int << 16) |
+	    sc->bce_rx_quick_cons_trip);
 	REG_WR(sc, BCE_HC_TX_TICKS,
 	    (sc->bce_tx_ticks_int << 16) | sc->bce_tx_ticks);
 	REG_WR(sc, BCE_HC_RX_TICKS,
 	    (sc->bce_rx_ticks_int << 16) | sc->bce_rx_ticks);
-	REG_WR(sc, BCE_HC_COM_TICKS,
-	    (sc->bce_com_ticks_int << 16) | sc->bce_com_ticks);
-	REG_WR(sc, BCE_HC_CMD_TICKS,
-	    (sc->bce_cmd_ticks_int << 16) | sc->bce_cmd_ticks);
-	REG_WR(sc, BCE_HC_STATS_TICKS,
-	    (sc->bce_stats_ticks & 0xffff00));
+	REG_WR(sc, BCE_HC_STATS_TICKS, sc->bce_stats_ticks & 0xffff00);
 	REG_WR(sc, BCE_HC_STAT_COLLECT_TICKS, 0xbb8);  /* 3ms */
+	/* Not used for L2. */
+	REG_WR(sc, BCE_HC_COMP_PROD_TRIP, 0);
+	REG_WR(sc, BCE_HC_COM_TICKS, 0);
+	REG_WR(sc, BCE_HC_CMD_TICKS, 0);
 
 	/* Configure the Host Coalescing block. */
 	val = BCE_HC_CONFIG_RX_TMR_MODE | BCE_HC_CONFIG_TX_TMR_MODE |
@@ -5554,15 +5529,14 @@ bce_get_pg_buf(struct bce_softc *sc, str
 		m_new->m_data = m_new->m_ext.ext_buf;
 	}
 
-	m_new->m_len = sc->pg_bd_mbuf_alloc_size;
+	m_new->m_len = MCLBYTES;
 
 	/* ToDo: Consider calling m_fragment() to test error handling. */
 
 	/* Map the mbuf cluster into device memory. */
 	map = sc->pg_mbuf_map[*prod_idx];
 	error = bus_dmamap_load(sc->pg_mbuf_tag, map, mtod(m_new, void *),
-	    sc->pg_bd_mbuf_alloc_size, bce_dma_map_addr,
-	    &busaddr, BUS_DMA_NOWAIT);
+	    MCLBYTES, bce_dma_map_addr, &busaddr, BUS_DMA_NOWAIT);
 
 	/* Handle any mapping errors. */
 	if (error) {
@@ -5586,7 +5560,7 @@ bce_get_pg_buf(struct bce_softc *sc, str
 
 	pgbd->rx_bd_haddr_lo  = htole32(BCE_ADDR_LO(busaddr));
 	pgbd->rx_bd_haddr_hi  = htole32(BCE_ADDR_HI(busaddr));
-	pgbd->rx_bd_len       = htole32(sc->pg_bd_mbuf_alloc_size);
+	pgbd->rx_bd_len       = htole32(MCLBYTES);
 	pgbd->rx_bd_flags     = htole32(RX_BD_FLAGS_START | RX_BD_FLAGS_END);
 
 	/* Save the mbuf and update our counter. */
@@ -5974,10 +5948,9 @@ bce_free_rx_chain(struct bce_softc *sc)
 
 	/* Clear each RX chain page. */
 	for (i = 0; i < sc->rx_pages; i++)
-		if (sc->rx_bd_chain[i] != NULL) {
+		if (sc->rx_bd_chain[i] != NULL)
 			bzero((char *)sc->rx_bd_chain[i],
 			    BCE_RX_CHAIN_PAGE_SZ);
-		}
 
 	sc->free_rx_bd = sc->max_rx_bd;
 
@@ -6041,7 +6014,7 @@ bce_init_pg_chain(struct bce_softc *sc)
 	CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_PG_BUF_SIZE, 0);
 
 	/* Configure the rx_bd and page chain mbuf cluster size. */
-	val = (sc->rx_bd_mbuf_data_len << 16) | sc->pg_bd_mbuf_alloc_size;
+	val = (sc->rx_bd_mbuf_data_len << 16) | MCLBYTES;
 	CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_RX_PG_BUF_SIZE, val);
 
 	/* Configure the context reserved for jumbo support. */
@@ -7163,10 +7136,9 @@ bce_init_locked(struct bce_softc *sc)
 		ether_mtu = ifp->if_mtu;
 	else {
 		if (bce_hdr_split == TRUE) {
-			if (ifp->if_mtu <= (sc->rx_bd_mbuf_data_len +
-				   sc->pg_bd_mbuf_alloc_size))
-					ether_mtu = sc->rx_bd_mbuf_data_len +
-					   sc->pg_bd_mbuf_alloc_size;
+			if (ifp->if_mtu <= sc->rx_bd_mbuf_data_len + MCLBYTES)
+				ether_mtu = sc->rx_bd_mbuf_data_len +
+				    MCLBYTES;
 			else
 				ether_mtu = ifp->if_mtu;
 		} else {
@@ -7194,9 +7166,6 @@ bce_init_locked(struct bce_softc *sc)
 	bce_set_rx_mode(sc);
 
 	if (bce_hdr_split == TRUE) {
-		DBPRINT(sc, BCE_INFO_LOAD, "%s(): pg_bd_mbuf_alloc_size = %d\n",
-			__FUNCTION__, sc->pg_bd_mbuf_alloc_size);
-
 		/* Init page buffer descriptor chain. */
 		bce_init_pg_chain(sc);
 	}
@@ -7690,7 +7659,6 @@ bce_start_locked(struct ifnet *ifp)
 
 bce_start_locked_exit:
 	DBEXIT(BCE_VERBOSE_SEND | BCE_VERBOSE_CTX);
-	return;
 }
 
 
@@ -8491,11 +8459,7 @@ bce_tick(void *xsc)
 	/* Update the statistics from the hardware statistics block. */
 	bce_stats_update(sc);
 
- 	/*
- 	 * ToDo: This is a safety measure.  Need to re-evaluate
- 	 * high	level processing logic and eliminate this code.
- 	 */
-	/* Top off the receive and page chains. */
+ 	/* Ensure page and RX chains get refilled in low-memory situations. */
 	if (bce_hdr_split == TRUE)
 		bce_fill_pg_chain(sc);
 	bce_fill_rx_chain(sc);
@@ -8544,7 +8508,6 @@ bce_tick(void *xsc)
 
 bce_tick_exit:
 	DBEXIT(BCE_EXTREME_MISC);
-	return;
 }
 
 static void
@@ -11627,7 +11590,5 @@ bce_breakpoint(struct bce_softc *sc)
 
 	/* Call the debugger. */
 	breakpoint();
-
-	return;
 }
 #endif

Modified: head/sys/dev/bce/if_bcefw.h
==============================================================================
--- head/sys/dev/bce/if_bcefw.h	Thu May 30 15:25:54 2013	(r251141)
+++ head/sys/dev/bce/if_bcefw.h	Thu May 30 16:09:56 2013	(r251142)
@@ -57,7 +57,7 @@ u32	bce_COM_b06FwSbssAddr = 0x08004aa0;
 int	bce_COM_b06FwSbssLen = 0x38;
 u32	bce_COM_b06FwSDataAddr = 0x00000000;
 int	bce_COM_b06FwSDataLen = 0x0;
-u32	bce_COM_b06FwText[(0x4a68/4) + 1] = {
+const u32	bce_COM_b06FwText[(0x4a68/4) + 1] = {
 0xa000046, 0x0, 0x0,
 0xd, 0x636f6d36, 0x2e302e31, 0x35000000,
 0x6000f02, 0x0, 0x3, 0xc8,
@@ -1249,14 +1249,14 @@ u32	bce_COM_b06FwText[(0x4a68/4) + 1] = 
 0x440fffe, 0x24020002, 0xaf5101c0, 0xa34201c4,
 0x3c021000, 0xaf4201f8, 0x8fbf0018, 0x8fb10014,
 0x8fb00010, 0x3e00008, 0x27bd0020, 0x0 };
-u32	bce_COM_b06FwData[(0x0/4) + 1] = { 0x0 };
-u32	bce_COM_b06FwRodata[(0x14/4) + 1] = {
+const u32	bce_COM_b06FwData[(0x0/4) + 1] = { 0x0 };
+const u32	bce_COM_b06FwRodata[(0x14/4) + 1] = {
 0x8000acc,
 0x8000b14, 0x8000b98, 0x8000be4, 0x8000c20,
 0x0 };
-u32	bce_COM_b06FwBss[(0xc4/4) + 1] = { 0x0 };
-u32	bce_COM_b06FwSbss[(0x38/4) + 1] = { 0x0 };
-u32	bce_COM_b06FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_COM_b06FwBss[(0xc4/4) + 1] = { 0x0 };
+const u32	bce_COM_b06FwSbss[(0x38/4) + 1] = { 0x0 };
+const u32	bce_COM_b06FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
 int	bce_RXP_b06FwReleaseMajor = 0x6;
@@ -1275,7 +1275,7 @@ u32	bce_RXP_b06FwSbssAddr = 0x08007320;
 int	bce_RXP_b06FwSbssLen = 0x4c;
 u32	bce_RXP_b06FwSDataAddr = 0x00000000;
 int	bce_RXP_b06FwSDataLen = 0x0;
-u32	bce_RXP_b06FwText[(0x72d0/4) + 1] = {
+const u32	bce_RXP_b06FwText[(0x72d0/4) + 1] = {
 0xa000c84, 0x0, 0x0,
 0xd, 0x72787036, 0x2e302e31, 0x35000000,
 0x6000f03, 0x0, 0x1, 0x0,
@@ -3114,15 +3114,15 @@ u32	bce_RXP_b06FwText[(0x72d0/4) + 1] = 
 0x8fbf0020, 0x8fb3001c, 0x8fb20018, 0x8fb10014,
 0x8fb00010, 0x3c021000, 0x27bd0028, 0x3e00008,
 0xaf4201b8, 0x0 };
-u32	bce_RXP_b06FwData[(0x0/4) + 1] = { 0x0 };
-u32	bce_RXP_b06FwRodata[(0x24/4) + 1] = {
+const u32	bce_RXP_b06FwData[(0x0/4) + 1] = { 0x0 };
+const u32	bce_RXP_b06FwRodata[(0x24/4) + 1] = {
 0x8003430,
 0x8003430, 0x80033a8, 0x80033e0, 0x8003414,
 0x8003438, 0x8003438, 0x8003438, 0x8003318,
 0x0 };
-u32	bce_RXP_b06FwBss[(0x440/4) + 1] = { 0x0 };
-u32	bce_RXP_b06FwSbss[(0x4c/4) + 1] = { 0x0 };
-u32	bce_RXP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_RXP_b06FwBss[(0x440/4) + 1] = { 0x0 };
+const u32	bce_RXP_b06FwSbss[(0x4c/4) + 1] = { 0x0 };
+const u32	bce_RXP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
 int	bce_TPAT_b06FwReleaseMajor = 0x6;
@@ -3141,7 +3141,7 @@ u32	bce_TPAT_b06FwSbssAddr = 0x08001c00;
 int	bce_TPAT_b06FwSbssLen = 0x44;
 u32	bce_TPAT_b06FwSDataAddr = 0x00000000;
 int	bce_TPAT_b06FwSDataLen = 0x0;
-u32	bce_TPAT_b06FwText[(0x17d4/4) + 1] = {
+const u32	bce_TPAT_b06FwText[(0x17d4/4) + 1] = {
 0xa000124, 0x0, 0x0,
 0xd, 0x74706136, 0x2e302e31, 0x35000000,
 0x6000f01, 0x0, 0x0, 0x0,
@@ -3524,11 +3524,11 @@ u32	bce_TPAT_b06FwText[(0x17d4/4) + 1] =
 0x14a0fffb, 0x42042, 0xc35021, 0x8fbf0010,
 0xa4c02, 0x312200ff, 0x27bd0018, 0xaf8a002c,
 0x3e00008, 0xaf890030, 0x0 };
-u32	bce_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 };
-u32	bce_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
-u32	bce_TPAT_b06FwBss[(0x450/4) + 1] = { 0x0 };
-u32	bce_TPAT_b06FwSbss[(0x44/4) + 1] = { 0x0 };
-u32	bce_TPAT_b06FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b06FwBss[(0x450/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b06FwSbss[(0x44/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b06FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
 int	bce_TXP_b06FwReleaseMajor = 0x6;
@@ -3547,7 +3547,7 @@ u32	bce_TXP_b06FwSbssAddr = 0x08003c20;
 int	bce_TXP_b06FwSbssLen = 0x68;
 u32	bce_TXP_b06FwSDataAddr = 0x00000000;
 int	bce_TXP_b06FwSDataLen = 0x0;
-u32	bce_TXP_b06FwText[(0x3bfc/4) + 1] = {
+const u32	bce_TXP_b06FwText[(0x3bfc/4) + 1] = {
 0xa00002a, 0x0, 0x0,
 0xd, 0x74787036, 0x2e302e31, 0x35000000,
 0x6000f00, 0x0, 0x136, 0xea60,
@@ -4509,11 +4509,11 @@ u32	bce_TXP_b06FwText[(0x3bfc/4) + 1] = 
 0x3c010800, 0xac243d58, 0x3c010800, 0xac233d68,
 0x3c010800, 0xac223d60, 0x3e00008, 0x0,
 0x0 };
-u32	bce_TXP_b06FwData[(0x0/4) + 1] = { 0x0 };
-u32	bce_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 };
-u32	bce_TXP_b06FwBss[(0x14c/4) + 1] = { 0x0 };
-u32	bce_TXP_b06FwSbss[(0x68/4) + 1] = { 0x0 };
-u32	bce_TXP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TXP_b06FwData[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TXP_b06FwBss[(0x14c/4) + 1] = { 0x0 };
+const u32	bce_TXP_b06FwSbss[(0x68/4) + 1] = { 0x0 };
+const u32	bce_TXP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
 int	bce_CP_b06FwReleaseMajor = 0x6;
@@ -4532,7 +4532,7 @@ u32	bce_CP_b06FwSbssAddr = 0x08005884;
 int	bce_CP_b06FwSbssLen = 0xf1;
 u32	bce_CP_b06FwSDataAddr = 0x00000000;
 int	bce_CP_b06FwSDataLen = 0x0;
-u32	bce_CP_b06FwText[(0x5688/4) + 1] = {
+const u32	bce_CP_b06FwText[(0x5688/4) + 1] = {
 0xa000028, 0x0, 0x0,
 0xd, 0x6370362e, 0x302e3135, 0x0,
 0x6000f04, 0x0, 0x0, 0x0,
@@ -5918,7 +5918,7 @@ u32	bce_CP_b06FwText[(0x5688/4) + 1] = {
 0x27bd0030, 0x8f83001c, 0x8c620004, 0x10400003,
 0x0, 0x3e00008, 0x0, 0x8c640010,
 0x8c650008, 0xa001527, 0x8c66000c, 0x0 };
-u32	bce_CP_b06FwData[(0x84/4) + 1] = {
+const u32	bce_CP_b06FwData[(0x84/4) + 1] = {
 0x0, 0x1b, 0xf,
 0xa, 0x8, 0x6, 0x5,
 0x5, 0x4, 0x4, 0x3,
@@ -5928,7 +5928,7 @@ u32	bce_CP_b06FwData[(0x84/4) + 1] = {
 0x2, 0x2, 0x2, 0x2,
 0x2, 0x2, 0x2, 0x1,
 0x1, 0x1, 0x0 };
-u32	bce_CP_b06FwRodata[(0x158/4) + 1] = {
+const u32	bce_CP_b06FwRodata[(0x158/4) + 1] = {
 0x8000f24, 0x8000d6c, 0x8000fb8,
 0x8001060, 0x8000f4c, 0x8000f8c, 0x8001194,
 0x8000d88, 0x80011b8, 0x8000dd8, 0x8001554,
@@ -5951,12 +5951,12 @@ u32	bce_CP_b06FwRodata[(0x158/4) + 1] = 
 0x8002e1c, 0x8002de4, 0x8002df0, 0x8002dfc,
 0x8002e08, 0x80052e8, 0x80052a8, 0x8005274,
 0x8005248, 0x8005224, 0x80051e0, 0x0 };
-u32	bce_CP_b06FwBss[(0x5d8/4) + 1] = { 0x0 };
-u32	bce_CP_b06FwSbss[(0xf1/4) + 1] = { 0x0 };
-u32	bce_CP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_CP_b06FwBss[(0x5d8/4) + 1] = { 0x0 };
+const u32	bce_CP_b06FwSbss[(0xf1/4) + 1] = { 0x0 };
+const u32	bce_CP_b06FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
-u32 bce_rv2p_proc1[] = {
+const u32 bce_rv2p_proc1[] = {
     0x00000010, 0xb1800006,
     0x0000001f, 0x0106000f,
     0x00000008, 0x0500ffff,
@@ -6681,7 +6681,7 @@ u32	bce_TXP_b09FwSbssAddr = 0x08003d88;
 int	bce_TXP_b09FwSbssLen = 0x64;
 u32	bce_TXP_b09FwSDataAddr = 0x00000000;
 int	bce_TXP_b09FwSDataLen = 0x0;
-u32	bce_TXP_b09FwText[(0x3d28/4) + 1] = {
+const u32	bce_TXP_b09FwText[(0x3d28/4) + 1] = {
 0xa00002a, 0x0, 0x0,
 0xd, 0x74787036, 0x2e302e31, 0x37000000,
 0x6001100, 0x0, 0x136, 0xea60,
@@ -7661,15 +7661,15 @@ u32	bce_TXP_b09FwText[(0x3d28/4) + 1] = 
 0xac263fcc, 0x3c010800, 0xac253fc4, 0x3c010800,
 0xac243fc0, 0x3c010800, 0xac233fd0, 0x3c010800,
 0xac223fc8, 0x3e00008, 0x0, 0x0 };
-u32	bce_TXP_b09FwData[(0x0/4) + 1] = { 0x0 };
-u32	bce_TXP_b09FwRodata[(0x30/4) + 1] = {
+const u32	bce_TXP_b09FwData[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TXP_b09FwRodata[(0x30/4) + 1] = {
 0x80000940, 0x80000900, 0x80080100,
 0x80080080, 0x80080000, 0x800e0000, 0x80080080,
 0x80080000, 0x80000a80, 0x80000a00, 0x80000980,
 0x80000900, 0x0 };
-u32	bce_TXP_b09FwBss[(0x24c/4) + 1] = { 0x0 };
-u32	bce_TXP_b09FwSbss[(0x64/4) + 1] = { 0x0 };
-u32	bce_TXP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TXP_b09FwBss[(0x24c/4) + 1] = { 0x0 };
+const u32	bce_TXP_b09FwSbss[(0x64/4) + 1] = { 0x0 };
+const u32	bce_TXP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
 int	bce_TPAT_b09FwReleaseMajor = 0x6;
@@ -7688,7 +7688,7 @@ u32	bce_TPAT_b09FwSbssAddr = 0x08001720;
 int	bce_TPAT_b09FwSbssLen = 0x3c;
 u32	bce_TPAT_b09FwSDataAddr = 0x00000000;
 int	bce_TPAT_b09FwSDataLen = 0x0;
-u32	bce_TPAT_b09FwText[(0x12fc/4) + 1] = {
+const u32	bce_TPAT_b09FwText[(0x12fc/4) + 1] = {
 0xa000124, 0x0, 0x0,
 0xd, 0x74706136, 0x2e302e31, 0x37000000,
 0x6001101, 0x0, 0x0, 0x0,
@@ -7994,12 +7994,12 @@ u32	bce_TPAT_b09FwText[(0x12fc/4) + 1] =
 0x0, 0x0, 0x2402ffff, 0x2463ffff,
 0x1462fffa, 0x24840004, 0x3e00008, 0x0,
 0x0 };
-u32	bce_TPAT_b09FwData[(0x0/4) + 1] = { 0x0 };
-u32	bce_TPAT_b09FwRodata[(0x4/4) + 1] = {
+const u32	bce_TPAT_b09FwData[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b09FwRodata[(0x4/4) + 1] = {
 0x1, 0x0 };
-u32	bce_TPAT_b09FwBss[(0x12b4/4) + 1] = { 0x0 };
-u32	bce_TPAT_b09FwSbss[(0x3c/4) + 1] = { 0x0 };
-u32	bce_TPAT_b09FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b09FwBss[(0x12b4/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b09FwSbss[(0x3c/4) + 1] = { 0x0 };
+const u32	bce_TPAT_b09FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
 int	bce_COM_b09FwReleaseMajor = 0x6;
@@ -8018,7 +8018,7 @@ u32	bce_COM_b09FwSbssAddr = 0x08005608;
 int	bce_COM_b09FwSbssLen = 0x30;
 u32	bce_COM_b09FwSDataAddr = 0x00000000;
 int	bce_COM_b09FwSDataLen = 0x0;
-u32	bce_COM_b09FwText[(0x5594/4) + 1] = {
+const u32	bce_COM_b09FwText[(0x5594/4) + 1] = {
 0xa000046, 0x0, 0x0,
 0xd, 0x636f6d36, 0x2e302e31, 0x37000000,
 0x6001102, 0x0, 0x3, 0xc8,
@@ -9389,15 +9389,15 @@ u32	bce_COM_b09FwText[(0x5594/4) + 1] = 
 0x40f809, 0x0, 0xa001560, 0x0,
 0xd, 0x3c1c0800, 0x279c5608, 0x8fbf0010,
 0x3e00008, 0x27bd0018, 0x0 };
-u32	bce_COM_b09FwData[(0x0/4) + 1] = { 0x0 };
-u32	bce_COM_b09FwRodata[(0x38/4) + 1] = {
+const u32	bce_COM_b09FwData[(0x0/4) + 1] = { 0x0 };
+const u32	bce_COM_b09FwRodata[(0x38/4) + 1] = {
 0x80080240, 0x80080100, 0x80080080,
 0x80080000, 0xc80, 0x3200, 0x8000e98,
 0x8000ef4, 0x8000f88, 0x8001028, 0x8001074,
 0x80080100, 0x80080080, 0x80080000, 0x0 };
-u32	bce_COM_b09FwBss[(0x11c/4) + 1] = { 0x0 };
-u32	bce_COM_b09FwSbss[(0x30/4) + 1] = { 0x0 };
-u32	bce_COM_b09FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_COM_b09FwBss[(0x11c/4) + 1] = { 0x0 };
+const u32	bce_COM_b09FwSbss[(0x30/4) + 1] = { 0x0 };
+const u32	bce_COM_b09FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
 int	bce_RXP_b09FwReleaseMajor = 0x6;
@@ -9416,7 +9416,7 @@ u32	bce_RXP_b09FwSbssAddr = 0x08009400;
 int	bce_RXP_b09FwSbssLen = 0x78;
 u32	bce_RXP_b09FwSDataAddr = 0x00000000;
 int	bce_RXP_b09FwSDataLen = 0x0;
-u32	bce_RXP_b09FwText[(0x9090/4) + 1] = {
+const u32	bce_RXP_b09FwText[(0x9090/4) + 1] = {
 0xa000c84, 0x0, 0x0,
 0xd, 0x72787036, 0x2e302e31, 0x37000000,
 0x6001103, 0x0, 0x1, 0x0,
@@ -11786,9 +11786,9 @@ u32	bce_RXP_b09FwRodata[(0x33c/4) + 1] =
 0x8007fc0, 0x8007fc0, 0x8007fc0, 0x8007fc0,
 0x8007fe8, 0x8008b6c, 0x8008cc8, 0x8008ca8,
 0x8008710, 0x8008b84, 0x0 };
-u32	bce_RXP_b09FwBss[(0x1bc/4) + 1] = { 0x0 };
-u32	bce_RXP_b09FwSbss[(0x78/4) + 1] = { 0x0 };
-u32	bce_RXP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_RXP_b09FwBss[(0x1bc/4) + 1] = { 0x0 };
+const u32	bce_RXP_b09FwSbss[(0x78/4) + 1] = { 0x0 };
+const u32	bce_RXP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
 int	bce_CP_b09FwReleaseMajor = 0x6;
@@ -11807,7 +11807,7 @@ u32	bce_CP_b09FwSbssAddr = 0x080059b0;
 int	bce_CP_b09FwSbssLen = 0xa8;
 u32	bce_CP_b09FwSDataAddr = 0x00000000;
 int	bce_CP_b09FwSDataLen = 0x0;
-u32	bce_CP_b09FwText[(0x5744/4) + 1] = {
+const u32	bce_CP_b09FwText[(0x5744/4) + 1] = {
 0xa000028, 0x0, 0x0,
 0xd, 0x6370362e, 0x302e3137, 0x0,
 0x6001104, 0x0, 0x0, 0x0,
@@ -13205,7 +13205,7 @@ u32	bce_CP_b09FwText[(0x5744/4) + 1] = {
 0xa00156a, 0x8fbf001c, 0xe0010d1, 0x0,
 0x5040ff9e, 0x8fbf001c, 0x9259007d, 0x3330003f,
 0xa0015c6, 0x36020040, 0x0 };
-u32	bce_CP_b09FwData[(0x84/4) + 1] = {
+const u32	bce_CP_b09FwData[(0x84/4) + 1] = {
 0x0, 0x1b, 0xf,
 0xa, 0x8, 0x6, 0x5,
 0x5, 0x4, 0x4, 0x3,
@@ -13215,7 +13215,7 @@ u32	bce_CP_b09FwData[(0x84/4) + 1] = {
 0x2, 0x2, 0x2, 0x2,
 0x2, 0x2, 0x2, 0x1,
 0x1, 0x1, 0x0 };
-u32	bce_CP_b09FwRodata[(0x1c0/4) + 1] = {
+const u32	bce_CP_b09FwRodata[(0x1c0/4) + 1] = {
 0x80080100,
 0x80080080, 0x80080000, 0xc00, 0x3080,
 0x80011d0, 0x800127c, 0x8001294, 0x80012a8,
@@ -13245,12 +13245,12 @@ u32	bce_CP_b09FwRodata[(0x1c0/4) + 1] = 
 0x80080080, 0x80080000, 0x80080080, 0x8004c64,
 0x8004c9c, 0x8004be4, 0x8004c64, 0x8004c64,
 0x80049b8, 0x8004c64, 0x8005050, 0x0 };
-u32	bce_CP_b09FwBss[(0x19c/4) + 1] = { 0x0 };
-u32	bce_CP_b09FwSbss[(0xa8/4) + 1] = { 0x0 };
-u32	bce_CP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
+const u32	bce_CP_b09FwBss[(0x19c/4) + 1] = { 0x0 };
+const u32	bce_CP_b09FwSbss[(0xa8/4) + 1] = { 0x0 };
+const u32	bce_CP_b09FwSdata[(0x0/4) + 1] = { 0x0 };
 
 
-u32 bce_xi_rv2p_proc1[] = {
+const u32 bce_xi_rv2p_proc1[] = {
     0x00000010, 0xb1800006,
     0x0000001f, 0x05060011,
     0x00000008, 0x0500ffff,
@@ -13541,7 +13541,7 @@ u32 bce_xi_rv2p_proc1[] = {
 };
 
 
-u32 bce_xi_rv2p_proc2[] = {
+const u32 bce_xi_rv2p_proc2[] = {
     0x00000010, 0xb1800004,
     0x0000001f, 0x05060011,
     0x00000008, 0x050000ff,
@@ -14008,9 +14008,9 @@ u32 bce_xi_rv2p_proc2[] = {
     0x00000010, 0x001f0000,
     0x00000018, 0x8000fe35,
 };
-
 
-u32 bce_xi90_rv2p_proc1[] = {
+
+const u32 bce_xi90_rv2p_proc1[] = {
 	 0x00000010, 0xb1800006,
 	 0x0000001f, 0x03060011,
 	 0x00000008, 0x0500ffff,
@@ -14316,7 +14316,7 @@ u32 bce_xi90_rv2p_proc1[] = {
 };
 
 
-u32 bce_xi90_rv2p_proc2[] = {
+const u32 bce_xi90_rv2p_proc2[] = {
     0x00000010, 0xb1800004,
     0x0000001f, 0x03060011,
     0x00000008, 0x050000ff,
@@ -14849,6 +14849,3 @@ u32 bce_xi90_rv2p_proc2[] = {
     bce_rv2p_proc2[BCE_RV2P_PROC2_MAX_BD_PAGE_LOC] = 						\
     (bce_rv2p_proc2[BCE_RV2P_PROC2_MAX_BD_PAGE_LOC] & ~0xFFFF) | (value);	\
 }
-
-
-

Modified: head/sys/dev/bce/if_bcereg.h
==============================================================================
--- head/sys/dev/bce/if_bcereg.h	Thu May 30 15:25:54 2013	(r251141)
+++ head/sys/dev/bce/if_bcereg.h	Thu May 30 16:09:56 2013	(r251142)
@@ -32,10 +32,6 @@
 #ifndef	_BCEREG_H_DEFINED
 #define _BCEREG_H_DEFINED
 
-#ifdef HAVE_KERNEL_OPTION_HEADERS
-#include "opt_device_polling.h"
-#endif
-
 #include <sys/param.h>
 #include <sys/endian.h>
 #include <sys/systm.h>
@@ -6336,13 +6332,13 @@ struct fw_info {
 	u32 bss_addr;
 	u32 bss_len;
 	u32 bss_index;
-	u32 *bss;
+	const u32 *bss;
 
 	/* Read-only section. */
 	u32 rodata_addr;
 	u32 rodata_len;
 	u32 rodata_index;
-	u32 *rodata;
+	const u32 *rodata;
 };
 
 #define RV2P_PROC1		0
@@ -6421,6 +6417,8 @@ struct fw_info {
 
 struct bce_softc
 {
+	struct mtx		bce_mtx;
+
 	/* Interface info */
 	struct ifnet		*bce_ifp;
 
@@ -6448,8 +6446,6 @@ struct bce_softc
 	/* IRQ Resource Handle */
 	struct resource		*bce_res_irq;
 
-	struct mtx		bce_mtx;
-
 	/* Interrupt handler. */
 	void			*bce_intrhand;
 
@@ -6563,14 +6559,6 @@ struct bce_softc
 	u16			bce_rx_ticks;
 	u32			bce_stats_ticks;
 
-	/* ToDo: Can these be removed? */
-	u16			bce_comp_prod_trip_int;
-	u16			bce_comp_prod_trip;
-	u16			bce_com_ticks_int;
-	u16			bce_com_ticks;
-	u16			bce_cmd_ticks_int;
-	u16			bce_cmd_ticks;
-
 	/* The address of the integrated PHY on the MII bus. */
 	int			bce_phy_addr;
 
@@ -6603,11 +6591,9 @@ struct bce_softc
 	int			watchdog_timer;
 
 	/* Frame size and mbuf allocation size for RX frames. */
-	u32			max_frame_size;
 	int			rx_bd_mbuf_alloc_size;
 	int			rx_bd_mbuf_data_len;
 	int			rx_bd_mbuf_align_pad;
-	int			pg_bd_mbuf_alloc_size;
 
 	/* Receive mode settings (i.e promiscuous, multicast, etc.). */
 	u32			rx_mode;



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