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Date:      Sun, 06 Apr 2003 23:32:40 +0200
From:      Dag-Erling Smorgrav <des@ofug.org>
To:        Nate Lawson <nate@root.org>
Cc:        Tor.Egge@cvsup.no.freebsd.org
Subject:   Re: cvs commit: src/sys/conf options.i386 src/sys/i386/i386 tsc.c src/sys/i386/conf NOTES
Message-ID:  <xzpof3js45j.fsf@flood.ping.uio.no>
In-Reply-To: <Pine.BSF.4.21.0304061338460.23366-100000@root.org> (Nate Lawson's message of "Sun, 6 Apr 2003 13:39:27 -0700 (PDT)")
References:  <Pine.BSF.4.21.0304061338460.23366-100000@root.org>

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--=-=-=

Nate Lawson <nate@root.org> writes:
> Perhaps you could enable this option by default if it had a corresponding
> check for drift that would disable it if things got out of hand.

There wouldn't be much point in that unless the SMP_TSC option also
forced the TSC to be selected at boot time.  On most SMP systems, the
PIIX timecounter is automatically selected by virtue of being
discovered last.

On a related note, the attached patch converts the SMP_TSC option into
a boot-time tunable.  It also enables the TSC on single-CPU systems
running an SMP kernel, since there is no synchronization problem with
a single CPU.

I must have bad benchmark karma, BTW - I can see no reduction of
context switch time or any other significant performance boost when
using the TSC on my dual Celeron system.

DES
-- 
Dag-Erling Smorgrav - des@ofug.org


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Content-Type: text/x-patch
Content-Disposition: attachment; filename=smp_tsc.diff

Index: conf/options.i386
===================================================================
RCS file: /home/ncvs/src/sys/conf/options.i386,v
retrieving revision 1.189
diff -u -r1.189 options.i386
--- conf/options.i386	4 Apr 2003 23:54:46 -0000	1.189
+++ conf/options.i386	6 Apr 2003 21:16:49 -0000
@@ -41,7 +41,6 @@
 CLK_CALIBRATION_LOOP		opt_clock.h
 CLK_USE_I8254_CALIBRATION	opt_clock.h
 CLK_USE_TSC_CALIBRATION		opt_clock.h
-SMP_TSC				opt_clock.h
 TIMER_FREQ			opt_clock.h
 
 NO_F00F_HACK			opt_cpu.h
Index: i386/conf/NOTES
===================================================================
RCS file: /home/ncvs/src/sys/i386/conf/NOTES,v
retrieving revision 1.1083
diff -u -r1.1083 NOTES
--- i386/conf/NOTES	4 Apr 2003 23:54:46 -0000	1.1083
+++ i386/conf/NOTES	6 Apr 2003 21:18:01 -0000
@@ -247,11 +247,6 @@
 options 	CLK_USE_I8254_CALIBRATION
 options 	CLK_USE_TSC_CALIBRATION
 
-# One some SMP mainboards, the TSCs can be used in SMP mode due to 
-# them being synchronized.  This can significantly reduce the context
-# switch cost.
-options		SMP_TSC
-
 
 #####################################################################
 # MISCELLANEOUS DEVICES AND OPTIONS
Index: i386/i386/tsc.c
===================================================================
RCS file: /home/ncvs/src/sys/i386/i386/tsc.c,v
retrieving revision 1.198
diff -u -r1.198 tsc.c
--- i386/i386/tsc.c	4 Apr 2003 23:54:46 -0000	1.198
+++ i386/i386/tsc.c	6 Apr 2003 21:30:43 -0000
@@ -30,11 +30,12 @@
 
 #include <sys/param.h>
 #include <sys/systm.h>
+#include <sys/sysctl.h>
 #include <sys/time.h>
 #include <sys/timetc.h>
 #include <sys/kernel.h>
-#include <sys/sysctl.h>
 #include <sys/power.h>
+#include <sys/smp.h>
 #include <machine/clock.h>
 #include <machine/md_var.h>
 #include <machine/specialreg.h>
@@ -43,6 +44,13 @@
 int		tsc_is_broken;
 u_int		tsc_present;
 
+#ifdef SMP
+static int	smp_tsc;
+SYSCTL_INT(_kern_timecounter, OID_AUTO, smp_tsc, CTLFLAG_RD, &smp_tsc, 0,
+    "Indicates whether the TSC is safe to use in SMP mode");
+TUNABLE_INT("kern.timecounter.smp_tsc", &smp_tsc);
+#endif
+
 static	unsigned tsc_get_timecount(struct timecounter *tc);
 
 static struct timecounter tsc_timecounter = {
@@ -77,14 +85,17 @@
 	if (bootverbose)
 		printf("TSC clock: %ju Hz\n", (intmax_t)tsc_freq);
 
-#if defined(SMP) && !defined(SMP_TSC)
+#ifdef SMP
 	/*
-	 * We can not use the TSC in SMP mode, until we figure out a
-	 * cheap (impossible), reliable and precise (yeah right!)  way
-	 * to synchronize the TSCs of all the CPUs.
-	 * Modern SMP hardware has the ACPI timer and we use that.
+	 * We can not use the TSC in SMP mode unless the TSCs on all CPUs
+	 * are somehow synchronized.  Some hardware configurations do
+	 * this, but we have no way of determining whether this is the
+	 * case, so we do not use the TSC in multi-processor systems
+	 * unless the user indicated (by setting kern.timecounter.smp_tsc
+	 * to 1) that he believes that his TSCs are synchronized.
 	 */
-	return;
+	if (mp_ncpus > 1 && !smp_tsc)
+		return;
 #endif
 
 	/*
Index: sys/timetc.h
===================================================================
RCS file: /home/ncvs/src/sys/sys/timetc.h,v
retrieving revision 1.56
diff -u -r1.56 timetc.h
--- sys/timetc.h	29 Jan 2003 11:29:22 -0000	1.56
+++ sys/timetc.h	6 Apr 2003 21:23:57 -0000
@@ -64,4 +64,8 @@
 void	tc_setclock(struct timespec *ts);
 void	tc_ticktock(void);
 
+#ifdef SYSCTL_DECL
+SYSCTL_DECL(_kern_timecounter);
+#endif
+
 #endif /* !_SYS_TIMETC_H_ */

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