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Date:      Wed, 01 May 2002 10:15:14 -0700
From:      Terry Lambert <tlambert2@mindspring.com>
To:        Andrew Gallatin <gallatin@cs.duke.edu>
Cc:        freebsd-smp@freebsd.org
Subject:   Re: hlt when idle?
Message-ID:  <3CD022A2.FACD21E9@mindspring.com>
References:  <15567.62317.677224.3470@grasshopper.cs.duke.edu>

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Andrew Gallatin wrote:
> Can somebody remind me why we do not hlt in the idle loop on MP x86s?

Halting with "giant" and/or "the scheduler lock" held is bad.

> Is this because a HLTed CPU is not going to notice a new runnable job
> (possibly migrating from another CPU) until it gets an interrupt to
> wake it up?

Partly.  It's worse than that, if the system is relatively
quiescent.  Interrupts are routed with entry to the kernel,
the system doesn't run in "virtual wire" mode, and it doesn't
support seperately routing interrupts.

What this means is that it's possible for an intertrupt event
on the non-halted processor to result in work for the halted
processor being available, and the halted processor never
noticing it.

The net effect is that one CPU goes to sleep and stays there,
either for a long time, or indefinitely, depending on the
timing and load at the time.


> Do both CPUs get clock interrupts on x86?

The clock interrupts may or may not be routed via the APIC;
routing of the clock interrupt is one of the most common
bogosities that you have to handle on x86 SMP systems; there
is a special printf for complaining about having to work
around broken BIOS and/or motherboard circuitry.

In theory, you want to run in "virtual wire mode", which means
that the CPUs get the interrupt, and then contend in order to
see who services it.

Another way to handle this would be to manually send IPIs for
certain events, like jobs being at the head of the scheduler
queue.  For this to work right, it's probably be a good idea
to record when a CPU is going idle, so that it can be targetted
specifically for wakeup, rather than targetting everyone.

It's ugly.


> Anyway, am I able to remove the SMP ifdef's from the default_halt
> function (on 4-stable, 2x1GHz PIII) and I have not noticed any change other
> than a cooler office & longer runtime on a UPS. (I've not timed a
> buildworld).

You might be lucky in your SMP hardware, and you might just not
be noticing the drop out of one CPU.  8-(.

Actually, the whole SMP HLT thing comes up once every six
months or so.  There's a much better discussion on the whole
issue, and the negative effects of the HLT, which took place
on the SMP list about 8 moths ago, and again, about 12 months
ago.

-- Terry

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