Date: Tue, 18 Jul 2000 13:29:23 -0700 (PDT) From: Matthew Jacob <mjacob@feral.com> To: "Justin T. Gibbs" <gibbs@plutotech.com> Cc: "Justin T. Gibbs" <gibbs@FreeBSD.org>, cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/cam cam_ccb.h cam_xpt.c src/sys/cam/scsi scsi_all.c scsi_message.h src/sys/dev/aic7xxx aicasm_insformat.h 93cx6.c 93cx6.h ahc_eisa.c ahc_pci.c aic7xxx.c aic7xxx.h aic7xxx.reg aic7xxx.seq aicasm.c aicasm.h aicasm_gram.y ... Message-ID: <Pine.BSF.4.05.10007181327270.3387-100000@semuta.feral.com> In-Reply-To: <200007182025.OAA53788@pluto.plutotech.com>
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> > > >What's the '39 bit addressing'? > > In the past, the S/G format looked like: > > uint8_t address[4]; > uint8_t datalen[3]; > uint8_t spare; > > Through some firmware manipulation, that last byte, other than a flag > bit, can be used as the 5th byte of the address. Oh, okay- this is an adaptec specific thingie. With 39 bits, you'll be able to cover what I believe is the current entire physical address space for all shipping Alpha platforms (they're all, I believe, 40 bit address space implementations- the top bit is an I/O vs. Memory space selector- remember p0 && p1 spaces for VAXen?). > >Also- maybe it's time to start considering 64 bit PCI > > I'm hoping that being able to address 512GB will be enough > for a while. I'd rather not expand the size of the S/G list > members for address space no-one will be touching for the > foreseeable future. Oh, I think I'm thinking more about the general PCI and bus_dma implementation where we might consider starting to have 64 bit versions RSN..... To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message
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