Date: Tue, 18 Jul 2000 15:05:24 -0700 From: Mike Smith <msmith@freebsd.org> To: mjacob@feral.com Cc: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/cam cam_ccb.h cam_xpt.c src/sys/cam/scsi scsi_all.c scsi_message.h src/sys/dev/aic7xxx aicasm_insformat.h 93cx6.c 93cx6.h ahc_eisa.c ahc_pci.c aic7xxx.c aic7xxx.h aic7xxx.reg aic7xxx.seq aicasm.c aicasm.h aicasm_gram.y ... Message-ID: <200007182205.PAA19358@mass.osd.bsdi.com> In-Reply-To: Your message of "Tue, 18 Jul 2000 13:29:23 PDT." <Pine.BSF.4.05.10007181327270.3387-100000@semuta.feral.com>
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> > >Also- maybe it's time to start considering 64 bit PCI > > > > I'm hoping that being able to address 512GB will be enough > > for a while. I'd rather not expand the size of the S/G list > > members for address space no-one will be touching for the > > foreseeable future. > > Oh, I think I'm thinking more about the general PCI and bus_dma implementation > where we might consider starting to have 64 bit versions RSN..... Definitely. The current crop of Mylex products are all 64-bit aware, for example; even the 32-bit-wide devices support DAC and can thus directly address the 64-bit space with a supporting bridge. The first order of battle is going to be passing a busdma tag down from the nexus through each bus/bridge, which will have to modify it accordingly to constrain the path. This will let us get the 'parent' DMA tag from the parent, rather than inventing it in the PCI bus attach routines. We'll also need PCI bouncebuffering added to the PCI bus_dma code. I guess this is all pretty obvious, and the real question is just "who is going to do this". 8) -- ... every activity meets with opposition, everyone who acts has his rivals and unfortunately opponents also. But not because people want to be opponents, rather because the tasks and relationships force people to take different points of view. [Dr. Fritz Todt] To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message
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