Date: Sat, 01 Nov 1997 23:45:24 +0000 From: =?iso-8859-1?Q?=DEor=F0ur?= Ivarsson <totii@est.is> To: "Jamil J. Weatherbee" <jamil@trojanhorse.ml.org> Cc: hackers@FreeBSD.ORG Subject: Re: 7400 gates effected by probe routine Message-ID: <345BBF14.446B9B3D@est.is> References: <Pine.BSF.3.96.971101134241.459A-100000@trojanhorse.ml.org>
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Jamil J. Weatherbee wrote: > > During a device probing routine I noticed that it is possible for the > outputs of two 7400 TTL gates one in the high state and one in the low > state to be connected together for not more than 10 microseconds. I was > looking at a transistor level diagram of a 7400 and would like to verify > the following. That this should not damage the gate itself, just pull > about 10 times the normal current. I don't see anyway to get around this > without just removing the probe routine. Who does design something like this? There is another 74xx chip with four nand gates and open collector outputs to do this, I am not sure for how long time this will last, but not for long, I think. -- Þórður Ívarsson Thordur Ivarsson Rafeindavirki Electronic technician Norðurgötu 30 Nordurgotu 30 Box 309 Box 309 602 Akureyri 602 Akureyri Ísland Iceland --------------------------------------------- FreeBSD has good features, Some others are full of unwanted features! ---------------------------------------------
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