Date: Fri, 24 Feb 2006 17:51:39 GMT From: Kip Macy <kmacy@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 92348 for review Message-ID: <200602241751.k1OHpdlG012788@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=92348 Change 92348 by kmacy@kmacy_storage:sun4v_work on 2006/02/24 17:50:39 add a couple of block initializing store ASIs add accessor macros for scratch registers use ASI immediates on store alternate instructions add tl0_end[] to enable CTASSERT on size of trap table comment fields in pcb remove page directory reference remove pcb reference from pcpu.h Affected files ... .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asi.h#8 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asmacros.h#2 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/cpufunc.h#5 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/md_var.h#4 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcb.h#3 edit .. //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcpu.h#4 edit Differences ... ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asi.h#8 (text+ko) ==== @@ -56,7 +56,9 @@ #define ASI_LDTD_AIUS 0x23 /* ASI_LOAD_TWIN_DW_AS_IF_USER_SECONDARY */ #define ASI_QUEUE 0x25 #define ASI_LDTD_REAL 0x26 /* ASI_LOAD_TWIN_DW_REAL */ +#define ASI_STBI_REAL 0x26 #define ASI_LDTD_N 0x27 /* ASI_LOAD_TWIN_DW_NUCLEUS */ +#define ASI_STBI_N 0x27 #define ASI_LDTD_AIUPL 0x2A /* ASI_LD_TWIN_DW_AS_IF_USER_PRIMARY_LITTLE */ #define ASI_LDTD_AIUSL 0x2B /* ASI_LD_TWIN_DW_AS_IF_USER_SECONDARY_LITTLE */ ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/asmacros.h#2 (text+ko) ==== @@ -32,17 +32,10 @@ #ifdef _KERNEL /* - * Normal and alternate %g6 point to the pcb of the current process. Normal, - & alternate and interrupt %g7 point to per-cpu data. + * %g7 points to per-cpu data. */ -#define PCB_REG %g6 #define PCPU_REG %g7 -/* - * Alternate %g5 points to a per-cpu panic stack, which is used as a last - * resort, and for temporarily saving alternate globals. - */ -#define ASP_REG %g5 #ifdef LOCORE @@ -134,6 +127,29 @@ #define EMPTY +#define GET_MMFSA_SCRATCH(reg) \ + ldxa [%g0 + %g0]ASI_SCRATCHPAD, reg; + +#define GET_PCPU_SCRATCH \ + mov SCRATCH_REG_PCPU, PCPU_REG; \ + ldxa [%g0 + PCPU_REG]ASI_SCRATCHPAD, PCPU_REG; + +#define GET_PTD_SCRATCH(reg) \ + mov SCRATCH_REG_PTD, reg; \ + ldxa [%g0 + reg]ASI_SCRATCHPAD, reg; + +#define SET_MMFSA_SCRATCH(reg) stxa reg, [%g0]ASI_SCRATCHPAD +#define SET_PCPU_SCRATCH stxa PCPU_REG, [%g0 + SCRATCH_REG_PCPU]ASI_SCRATCHPAD +#define SET_PTD_SCRATCH(reg) stxa reg, [%g0 + SCRATCH_REG_PTD]ASI_SCRATCHPAD + +#define GET_PCB(reg) \ + GET_PCPU_SCRATCH; \ + ldx [PCPU_REG + PC_CURPCB], reg; + +#define SAVE_V8_WINDOW(reg) + + + #endif /* LOCORE */ #endif /* _KERNEL */ ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/cpufunc.h#5 (text+ko) ==== @@ -116,6 +116,15 @@ #define lduwa(va, asi) LD_GENERIC(va, asi, lduwa, u_int) #define ldxa(va, asi) LD_GENERIC(va, asi, ldxa, u_long) +#if 1 +#define STNC_GEN(tp, o) \ + static __inline void \ + o ## _nc(caddr_t va, int asi, tp val) \ + { \ + __asm __volatile(#o " %0, [%g0 + %1] %2"\ + : : "r" (val), "r" (va), "r" (asi)); \ + } +#else #define STNC_GEN(tp, o) \ static __inline void \ o ## _nc(caddr_t va, int asi, tp val) \ @@ -123,6 +132,7 @@ __asm __volatile("wr %2, 0, %%asi;" #o " %0, [%1] %%asi"\ : : "r" (val), "r" (va), "r" (asi)); \ } +#endif STNC_GEN(u_char, stba); STNC_GEN(u_short, stha); ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/md_var.h#4 (text+ko) ==== @@ -36,7 +36,7 @@ typedef void cpu_block_copy_t(const void *src, void *dst, size_t len); typedef void cpu_block_zero_t(void *dst, size_t len); -extern char tl0_base[]; +extern char tl0_base[], tl0_end[]; extern char _end[]; extern long Maxmem; ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcb.h#3 (text+ko) ==== @@ -37,16 +37,16 @@ /* NOTE: pcb_ufp must be aligned on a 64 byte boundary. */ struct pcb { - struct rwindow pcb_rw[MAXWIN]; - uint32_t pcb_kfp[64]; - uint32_t pcb_ufp[64]; - uint64_t pcb_rwsp[MAXWIN]; + struct rwindow pcb_rw[MAXWIN]; /* wbuf for page faults during spill / fill trap handling */ + uint32_t pcb_kfp[64]; /* used for regs in handling kernel floating point exc */ + uint32_t pcb_ufp[64]; /* used for regs in handling user floating point exc */ + uint64_t pcb_rwsp[MAXWIN]; /* spbuf sp's for each wbuf */ uint64_t pcb_flags; - uint64_t pcb_nsaved; - uint64_t pcb_pc; + uint32_t pcb_nsaved; /* number of windows saved in pcb_rw */ + uint32_t pcb_pc; uint64_t pcb_sp; - vm_paddr_t *pcb_pdir; - uint64_t pcb_pad[3]; + uint64_t pcb_pa; /* physical address of pcb */ + uint64_t pcb_pad[4]; } __aligned(64); #ifdef _KERNEL ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/include/pcpu.h#4 (text+ko) ==== @@ -82,10 +82,8 @@ * be L2 cache aligned - they're surrounded by per-cpu data, so there is * no possibility of false sharing, but this might help in reducing misses */ -struct pcb; struct pcpu; -register struct pcb *curpcb __asm__(__XSTRING(PCB_REG)); register struct pcpu *pcpup __asm__(__XSTRING(PCPU_REG)); #define PCPU_GET(member) (pcpup->pc_ ## member)
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