Date: Wed, 29 Jun 2011 16:12:04 +0530 From: "Jayachandran C." <c.jayachandran@gmail.com> To: Attilio Rao <attilio@freebsd.org> Cc: Warner Losh <imp@freebsd.org>, freebsd-mips@freebsd.org Subject: Re: Bumping MAXCPU for MIPS configurations Message-ID: <BANLkTik%2Bhz-S=umvmy99SScypNg8JFfRWg@mail.gmail.com> In-Reply-To: <BANLkTima1XC-K0d2gY=hRSb1BGE_TX2rZw@mail.gmail.com> References: <BANLkTima1XC-K0d2gY=hRSb1BGE_TX2rZw@mail.gmail.com>
next in thread | previous in thread | raw e-mail | index | archive | help
On Wed, Jun 29, 2011 at 3:10 PM, Attilio Rao <attilio@freebsd.org> wrote: > [ Please CC me in replies as I'm not subscribed to this mailing list ] > > I'm planning to bump MAXCPU for all the kernel configurations > requiring it, as long as the latest cut of largeSMP changes is > completed. > > Anyway, I'm not really sure what MIPS configurations may benefit from > a larger number of MAXCPU. Probabilly XLP should, for what I've heard, > but I'd like to get a precise mapping between configurations that want > to bump the number and the actual maximum number of CPUs to be > supported. An XLP SoC has 32 cpus (8cores x 4 hw threads per core), and 4 of these can be interconnected to have upto 128 cpus. We have an XLP port running on one chip with 32cpus, but there is interest in trying out 2 chip (64cpus) and 4 chip(128 cpus) configurations, so this is something I want to do when I get access to multi-chip boards for FreeBSD development. Each XLP SoC has built-in memory controllers, network accelerator, PCIe, UARTs, USB etc., so ideally we want to be NUMA aware rather than doing straight SMP across all the chips. But this is an area I have not looked into yet. JC (Netlogic hat on).
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?BANLkTik%2Bhz-S=umvmy99SScypNg8JFfRWg>