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Date:      Fri, 24 Sep 2021 01:35:16 GMT
From:      Kevin Bowling <kbowling@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 41ff2b03ae8a - stable/13 - e1000: add missing register defines
Message-ID:  <202109240135.18O1ZGtN029339@gitrepo.freebsd.org>

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The branch stable/13 has been updated by kbowling (ports committer):

URL: https://cgit.FreeBSD.org/src/commit/?id=41ff2b03ae8afaab81500336217a9949eb7ef4ad

commit 41ff2b03ae8afaab81500336217a9949eb7ef4ad
Author:     Guinan Sun <guinanx.sun@intel.com>
AuthorDate: 2020-07-06 08:12:08 +0000
Commit:     Kevin Bowling <kbowling@FreeBSD.org>
CommitDate: 2021-09-24 01:29:25 +0000

    e1000: add missing register defines
    
    Added defines for the EEC, SHADOWINF and FLFWUPDATE registers needed for
    the nvmupd_validate_offset function to correctly validate the NVM update
    offset.
    
    Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
    Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
    Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
    
    Approved by:    imp
    Obtained from:  DPDK (2c7fe65ab9a31e6ebf438dad7ccc59bcde83a89f)
    MFC after:      1 week
    
    (cherry picked from commit 09888d4bc1a2c45d121046f79be5c01e4889a67e)
---
 sys/dev/e1000/e1000_regs.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/sys/dev/e1000/e1000_regs.h b/sys/dev/e1000/e1000_regs.h
index 2b7696ddea62..fe9834405359 100644
--- a/sys/dev/e1000/e1000_regs.h
+++ b/sys/dev/e1000/e1000_regs.h
@@ -169,6 +169,8 @@
 #define E1000_EMIDATA	0x11     /* Extended Memory Indirect Data */
 /* Shadow Ram Write Register - RW */
 #define E1000_SRWR		0x12018
+#define E1000_EEC_REG		0x12010
+
 #define E1000_I210_FLMNGCTL	0x12038
 #define E1000_I210_FLMNGDATA	0x1203C
 #define E1000_I210_FLMNGCNT	0x12040
@@ -179,6 +181,9 @@
 
 #define E1000_I210_FLA		0x1201C
 
+#define E1000_SHADOWINF		0x12068
+#define E1000_FLFWUPDATE	0x12108
+
 #define E1000_INVM_DATA_REG(_n)	(0x12120 + 4*(_n))
 #define E1000_INVM_SIZE		64 /* Number of INVM Data Registers */
 



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