Date: Mon, 21 Mar 2011 02:15:12 +0000 (UTC) From: Marcel Moolenaar <marcel@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r219810 - in projects/altix/sys: amd64/conf conf dev/ath/ath_hal dev/ath/ath_hal/ar5212 dev/ath/ath_hal/ar5416 dev/e1000 dev/vte i386/conf ia64/conf ia64/ia64 ia64/include kern mips/con... Message-ID: <201103210215.p2L2FC4u096195@svn.freebsd.org>
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Author: marcel Date: Mon Mar 21 02:15:12 2011 New Revision: 219810 URL: http://svn.freebsd.org/changeset/base/219810 Log: Merge svn+ssh://svn.freebsd.org/base/head@219808 Modified: projects/altix/sys/amd64/conf/GENERIC projects/altix/sys/conf/options projects/altix/sys/dev/ath/ath_hal/ah.h projects/altix/sys/dev/ath/ath_hal/ah_diagcodes.h projects/altix/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c projects/altix/sys/dev/ath/ath_hal/ar5212/ar5212_recv.c projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416.h projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c projects/altix/sys/dev/e1000/if_em.h projects/altix/sys/dev/e1000/if_lem.h projects/altix/sys/dev/vte/if_vte.c projects/altix/sys/dev/vte/if_vtereg.h projects/altix/sys/i386/conf/GENERIC projects/altix/sys/ia64/conf/GENERIC projects/altix/sys/ia64/ia64/db_machdep.c projects/altix/sys/ia64/ia64/gdb_machdep.c projects/altix/sys/ia64/ia64/pmap.c projects/altix/sys/ia64/include/pmap.h projects/altix/sys/ia64/include/vmparam.h projects/altix/sys/kern/sys_pipe.c projects/altix/sys/mips/conf/OCTEON1 projects/altix/sys/modules/ufs/Makefile projects/altix/sys/net/route.c projects/altix/sys/net/route.h projects/altix/sys/netgraph/ng_iface.c projects/altix/sys/netinet/in_pcb.c projects/altix/sys/sparc64/pci/fire.c projects/altix/sys/sparc64/pci/ofw_pcibus.c projects/altix/sys/sparc64/sparc64/tick.c projects/altix/sys/ufs/ffs/ffs_vfsops.c projects/altix/sys/ufs/ufs/ufs_lookup.c projects/altix/sys/ufs/ufs/ufsmount.h Directory Properties: projects/altix/lib/libstand/ (props changed) projects/altix/sys/ (props changed) projects/altix/sys/amd64/include/xen/ (props changed) projects/altix/sys/boot/i386/efi/ (props changed) projects/altix/sys/boot/ia64/efi/ (props changed) projects/altix/sys/boot/ia64/ski/ (props changed) projects/altix/sys/boot/powerpc/boot1.chrp/ (props changed) projects/altix/sys/boot/powerpc/ofw/ (props changed) projects/altix/sys/cddl/contrib/opensolaris/ (props changed) projects/altix/sys/conf/ (props changed) projects/altix/sys/contrib/dev/acpica/ (props changed) projects/altix/sys/contrib/octeon-sdk/ (props changed) projects/altix/sys/contrib/pf/ (props changed) projects/altix/sys/contrib/x86emu/ (props changed) projects/altix/sys/kern/subr_busdma.c (props changed) Modified: projects/altix/sys/amd64/conf/GENERIC ============================================================================== --- projects/altix/sys/amd64/conf/GENERIC Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/amd64/conf/GENERIC Mon Mar 21 02:15:12 2011 (r219810) @@ -61,7 +61,6 @@ options KBD_INSTALL_CDEV # install a CD options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) options AUDIT # Security event auditing options MAC # TrustedBSD MAC Framework -options FLOWTABLE # per-cpu routing cache #options KDTRACE_FRAME # Ensure frames are compiled in #options KDTRACE_HOOKS # Kernel DTrace hooks options INCLUDE_CONFIG_FILE # Include this file in kernel Modified: projects/altix/sys/conf/options ============================================================================== --- projects/altix/sys/conf/options Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/conf/options Mon Mar 21 02:15:12 2011 (r219810) @@ -200,6 +200,7 @@ CD9660 opt_dontuse.h CODA opt_dontuse.h EXT2FS opt_dontuse.h FDESCFS opt_dontuse.h +FFS opt_dontuse.h HPFS opt_dontuse.h MSDOSFS opt_dontuse.h NTFS opt_dontuse.h @@ -217,9 +218,6 @@ UNIONFS opt_dontuse.h # Pseudofs debugging PSEUDOFS_TRACE opt_pseudofs.h -# Broken - ffs_snapshot() dependency from ufs_lookup() :-( -FFS opt_ffs_broken_fixme.h - # In-kernel GSS-API KGSSAPI opt_kgssapi.h KGSSAPI_DEBUG opt_kgssapi.h Modified: projects/altix/sys/dev/ath/ath_hal/ah.h ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ah.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ah.h Mon Mar 21 02:15:12 2011 (r219810) @@ -141,6 +141,7 @@ typedef enum { HAL_TX_QUEUE_BEACON = 2, /* beacon xmit q */ HAL_TX_QUEUE_CAB = 3, /* "crap after beacon" xmit q */ HAL_TX_QUEUE_UAPSD = 4, /* u-apsd power save xmit q */ + HAL_TX_QUEUE_PSPOLL = 5, /* power save poll xmit q */ } HAL_TX_QUEUE; #define HAL_NUM_TX_QUEUES 10 /* max possible # of queues */ @@ -596,6 +597,33 @@ struct ath_rx_status; struct ieee80211_channel; /* + * This is a channel survey sample entry. + * + * The AR5212 ANI routines fill these samples. The ANI code then uses it + * when calculating listen time; it is also exported via a diagnostic + * API. + */ +typedef struct { + uint32_t seq_num; + uint32_t tx_busy; + uint32_t rx_busy; + uint32_t chan_busy; + uint32_t cycle_count; +} HAL_SURVEY_SAMPLE; + +/* + * This provides 3.2 seconds of sample space given an + * ANI time of 1/10th of a second. This may not be enough! + */ +#define CHANNEL_SURVEY_SAMPLE_COUNT 32 + +typedef struct { + HAL_SURVEY_SAMPLE samples[CHANNEL_SURVEY_SAMPLE_COUNT]; + uint32_t cur_sample; /* current sample in sequence */ + uint32_t cur_seq; /* current sequence number */ +} HAL_CHANNEL_SURVEY; + +/* * Hardware Access Layer (HAL) API. * * Clients of the HAL call ath_hal_attach to obtain a reference to an Modified: projects/altix/sys/dev/ath/ath_hal/ah_diagcodes.h ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ah_diagcodes.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ah_diagcodes.h Mon Mar 21 02:15:12 2011 (r219810) @@ -62,6 +62,7 @@ enum { HAL_DIAG_ANI_PARAMS = 31, /* ANI noise immunity parameters */ HAL_DIAG_CHECK_HANGS = 32, /* check h/w hangs */ HAL_DIAG_SETREGS = 33, /* write registers */ + HAL_DIAG_CHANSURVEY = 34, /* channel survey */ }; #endif /* _ATH_AH_DIAGCODES_H_ */ Modified: projects/altix/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c Mon Mar 21 02:15:12 2011 (r219810) @@ -934,7 +934,7 @@ ar5212SetCapability(struct ath_hal *ah, else ahp->ah_miscMode |= AR_MISC_MODE_MIC_NEW_LOC_ENABLE; /* NB: write here so keys can be setup w/o a reset */ - OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode); + OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); return AH_TRUE; case HAL_CAP_DIVERSITY: if (ahp->ah_phyPowerOn) { Modified: projects/altix/sys/dev/ath/ath_hal/ar5212/ar5212_recv.c ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ar5212/ar5212_recv.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ar5212/ar5212_recv.c Mon Mar 21 02:15:12 2011 (r219810) @@ -199,7 +199,7 @@ ar5212SetRxFilter(struct ath_hal *ah, ui ahp->ah_miscMode |= AR_MISC_MODE_BSSID_MATCH_FORCE; else ahp->ah_miscMode &= ~AR_MISC_MODE_BSSID_MATCH_FORCE; - OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode); + OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); } } Modified: projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416.h ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416.h Mon Mar 21 02:15:12 2011 (r219810) @@ -275,6 +275,10 @@ extern HAL_STATUS ar5416ProcTxDesc(struc extern HAL_BOOL ar5416GetTxCompletionRates(struct ath_hal *ah, const struct ath_desc *ds0, int *rates, int *tries); +extern HAL_BOOL ar5416ResetTxQueue(struct ath_hal *ah, u_int q); +extern int ar5416SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type, + const HAL_TXQ_INFO *qInfo); + extern HAL_BOOL ar5416ChainTxDesc(struct ath_hal *ah, struct ath_desc *ds, u_int pktLen, u_int hdrLen, HAL_PKT_TYPE type, u_int keyIx, HAL_CIPHER cipher, uint8_t delims, u_int segLen, HAL_BOOL firstSeg, Modified: projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c Mon Mar 21 02:15:12 2011 (r219810) @@ -855,10 +855,16 @@ ar5416AniPoll(struct ath_hal *ah, const /* check to see if need to raise immunity */ if (aniState->ofdmPhyErrCount > aniState->listenTime * params->ofdmTrigHigh / 1000) { + HALDEBUG(ah, HAL_DEBUG_ANI, + "%s: OFDM err %u listenTime %u\n", __func__, + aniState->ofdmPhyErrCount, aniState->listenTime); ar5416AniOfdmErrTrigger(ah); ar5416AniRestart(ah, aniState); } else if (aniState->cckPhyErrCount > aniState->listenTime * params->cckTrigHigh / 1000) { + HALDEBUG(ah, HAL_DEBUG_ANI, + "%s: CCK err %u listenTime %u\n", __func__, + aniState->ofdmPhyErrCount, aniState->listenTime); ar5416AniCckErrTrigger(ah); ar5416AniRestart(ah, aniState); } Modified: projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Mon Mar 21 02:15:12 2011 (r219810) @@ -112,6 +112,8 @@ ar5416InitState(struct ath_hal_5416 *ahp ah->ah_fillTxDesc = ar5416FillTxDesc; ah->ah_procTxDesc = ar5416ProcTxDesc; ah->ah_getTxCompletionRates = ar5416GetTxCompletionRates; + ah->ah_setupTxQueue = ar5416SetupTxQueue; + ah->ah_resetTxQueue = ar5416ResetTxQueue; /* Receive Functions */ ah->ah_startPcuReceive = ar5416StartPcuReceive; @@ -372,7 +374,7 @@ ar5416Attach(uint16_t devid, HAL_SOFTC s * placed into hardware. */ if (ahp->ah_miscMode != 0) - OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode); + OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); rfStatus = ar2133RfAttach(ah, &ecode); if (!rfStatus) { Modified: projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c Mon Mar 21 02:15:12 2011 (r219810) @@ -72,9 +72,12 @@ ar5416IsCalSupp(struct ath_hal *ah, cons return !IEEE80211_IS_CHAN_B(chan); case ADC_GAIN_CAL: case ADC_DC_CAL: - /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */ - return !IEEE80211_IS_CHAN_B(chan) && - !(IEEE80211_IS_CHAN_2GHZ(chan) && IEEE80211_IS_CHAN_HT20(chan)); + /* Run ADC Gain Cal for either 5ghz any or 2ghz HT40 */ + if (IEEE80211_IS_CHAN_2GHZ(chan)) + return AH_FALSE; + if (IEEE80211_IS_CHAN_HT20(chan)) + return AH_FALSE; + return AH_TRUE; } return AH_FALSE; } @@ -232,11 +235,13 @@ ar5416InitCalHardware(struct ath_hal *ah /* * Initialize Calibration infrastructure. */ +#define MAX_CAL_CHECK 32 HAL_BOOL ar5416InitCal(struct ath_hal *ah, const struct ieee80211_channel *chan) { struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; HAL_CHANNEL_INTERNAL *ichan; + int i; ichan = ath_hal_checkchannel(ah, chan); HALASSERT(ichan != AH_NULL); @@ -261,13 +266,29 @@ ar5416InitCal(struct ath_hal *ah, const /* XXX this actually kicks off a NF calibration -adrian */ OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); /* - * Try to make sure the above NF cal completes, just so - * it doesn't clash with subsequent percals -adrian + * This sometimes takes a -lot- longer than it should. + * Just give it a bit more time. */ - if (! ar5212WaitNFCalComplete(ah, 10000)) { + for (i = 0; i < MAX_CAL_CHECK; i++) { + if (ar5212WaitNFCalComplete(ah, 10000)) + break; + HALDEBUG(ah, HAL_DEBUG_ANY, "%s: initial NF calibration did " - "not complete in time; noisy environment?\n", __func__); - return AH_FALSE; + "not complete in time; noisy environment (pass %d)?\n", __func__, i); + } + + /* + * Although periodic and NF calibrations shouldn't run concurrently, + * this was causing the radio to not be usable on the active + * channel if the channel was busy. + * + * Instead, now simply print a warning and continue. That way if users + * report "weird crap", they should get this warning. + */ + if (i >= MAX_CAL_CHECK) { + ath_hal_printf(ah, "[ath] Warning - initial NF calibration did " + "not complete in time, noisy environment?\n"); + /* return AH_FALSE; */ } /* Initialize list pointers */ @@ -322,6 +343,7 @@ ar5416InitCal(struct ath_hal *ah, const ichan->calValid = 0; return AH_TRUE; +#undef MAX_CAL_CHECK } /* Modified: projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Mon Mar 21 02:15:12 2011 (r219810) @@ -285,7 +285,7 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO ahp->ah_intrTxqs = 0; for (i = 0; i < AH_PRIVATE(ah)->ah_caps.halTotalQueues; i++) - ar5212ResetTxQueue(ah, i); + ah->ah_resetTxQueue(ah, i); ar5416InitIMR(ah, opmode); ar5212SetCoverageClass(ah, AH_PRIVATE(ah)->ah_coverageClass, 1); @@ -581,7 +581,7 @@ ar5416InitUserSettings(struct ath_hal *a /* Restore user-specified settings */ if (ahp->ah_miscMode != 0) - OS_REG_WRITE(ah, AR_MISC_MODE, ahp->ah_miscMode); + OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode); if (ahp->ah_sifstime != (u_int) -1) ar5212SetSifsTime(ah, ahp->ah_sifstime); if (ahp->ah_slottime != (u_int) -1) Modified: projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c ============================================================================== --- projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Mon Mar 21 02:15:12 2011 (r219810) @@ -740,3 +740,341 @@ ar5416GetTxCompletionRates(struct ath_ha return AH_TRUE; } + +/* + * TX queue management routines - AR5416 and later chipsets + */ + +/* + * Allocate and initialize a tx DCU/QCU combination. + */ +int +ar5416SetupTxQueue(struct ath_hal *ah, HAL_TX_QUEUE type, + const HAL_TXQ_INFO *qInfo) +{ + struct ath_hal_5212 *ahp = AH5212(ah); + HAL_TX_QUEUE_INFO *qi; + HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; + int q, defqflags; + + /* by default enable OK+ERR+DESC+URN interrupts */ + defqflags = HAL_TXQ_TXOKINT_ENABLE + | HAL_TXQ_TXERRINT_ENABLE + | HAL_TXQ_TXDESCINT_ENABLE + | HAL_TXQ_TXURNINT_ENABLE; + /* XXX move queue assignment to driver */ + switch (type) { + case HAL_TX_QUEUE_BEACON: + q = pCap->halTotalQueues-1; /* highest priority */ + defqflags |= HAL_TXQ_DBA_GATED + | HAL_TXQ_CBR_DIS_QEMPTY + | HAL_TXQ_ARB_LOCKOUT_GLOBAL + | HAL_TXQ_BACKOFF_DISABLE; + break; + case HAL_TX_QUEUE_CAB: + q = pCap->halTotalQueues-2; /* next highest priority */ + defqflags |= HAL_TXQ_DBA_GATED + | HAL_TXQ_CBR_DIS_QEMPTY + | HAL_TXQ_CBR_DIS_BEMPTY + | HAL_TXQ_ARB_LOCKOUT_GLOBAL + | HAL_TXQ_BACKOFF_DISABLE; + break; + case HAL_TX_QUEUE_UAPSD: + q = pCap->halTotalQueues-3; /* nextest highest priority */ + if (ahp->ah_txq[q].tqi_type != HAL_TX_QUEUE_INACTIVE) { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: no available UAPSD tx queue\n", __func__); + return -1; + } + break; + case HAL_TX_QUEUE_DATA: + for (q = 0; q < pCap->halTotalQueues; q++) + if (ahp->ah_txq[q].tqi_type == HAL_TX_QUEUE_INACTIVE) + break; + if (q == pCap->halTotalQueues) { + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: no available tx queue\n", __func__); + return -1; + } + break; + default: + HALDEBUG(ah, HAL_DEBUG_ANY, + "%s: bad tx queue type %u\n", __func__, type); + return -1; + } + + HALDEBUG(ah, HAL_DEBUG_TXQUEUE, "%s: queue %u\n", __func__, q); + + qi = &ahp->ah_txq[q]; + if (qi->tqi_type != HAL_TX_QUEUE_INACTIVE) { + HALDEBUG(ah, HAL_DEBUG_ANY, "%s: tx queue %u already active\n", + __func__, q); + return -1; + } + OS_MEMZERO(qi, sizeof(HAL_TX_QUEUE_INFO)); + qi->tqi_type = type; + if (qInfo == AH_NULL) { + qi->tqi_qflags = defqflags; + qi->tqi_aifs = INIT_AIFS; + qi->tqi_cwmin = HAL_TXQ_USEDEFAULT; /* NB: do at reset */ + qi->tqi_cwmax = INIT_CWMAX; + qi->tqi_shretry = INIT_SH_RETRY; + qi->tqi_lgretry = INIT_LG_RETRY; + qi->tqi_physCompBuf = 0; + } else { + qi->tqi_physCompBuf = qInfo->tqi_compBuf; + (void) ar5212SetTxQueueProps(ah, q, qInfo); + } + /* NB: must be followed by ar5212ResetTxQueue */ + return q; +} + +/* + * Update the h/w interrupt registers to reflect a tx q's configuration. + */ +static void +setTxQInterrupts(struct ath_hal *ah, HAL_TX_QUEUE_INFO *qi) +{ + struct ath_hal_5212 *ahp = AH5212(ah); + + HALDEBUG(ah, HAL_DEBUG_TXQUEUE, + "%s: tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n", __func__, + ahp->ah_txOkInterruptMask, ahp->ah_txErrInterruptMask, + ahp->ah_txDescInterruptMask, ahp->ah_txEolInterruptMask, + ahp->ah_txUrnInterruptMask); + + OS_REG_WRITE(ah, AR_IMR_S0, + SM(ahp->ah_txOkInterruptMask, AR_IMR_S0_QCU_TXOK) + | SM(ahp->ah_txDescInterruptMask, AR_IMR_S0_QCU_TXDESC) + ); + OS_REG_WRITE(ah, AR_IMR_S1, + SM(ahp->ah_txErrInterruptMask, AR_IMR_S1_QCU_TXERR) + | SM(ahp->ah_txEolInterruptMask, AR_IMR_S1_QCU_TXEOL) + ); + OS_REG_RMW_FIELD(ah, AR_IMR_S2, + AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask); +} + +/* + * Set the retry, aifs, cwmin/max, readyTime regs for specified queue + * Assumes: + * phwChannel has been set to point to the current channel + */ +HAL_BOOL +ar5416ResetTxQueue(struct ath_hal *ah, u_int q) +{ + struct ath_hal_5212 *ahp = AH5212(ah); + HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps; + const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan; + HAL_TX_QUEUE_INFO *qi; + uint32_t cwMin, chanCwMin, value, qmisc, dmisc; + + if (q >= pCap->halTotalQueues) { + HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid queue num %u\n", + __func__, q); + return AH_FALSE; + } + qi = &ahp->ah_txq[q]; + if (qi->tqi_type == HAL_TX_QUEUE_INACTIVE) { + HALDEBUG(ah, HAL_DEBUG_TXQUEUE, "%s: inactive queue %u\n", + __func__, q); + return AH_TRUE; /* XXX??? */ + } + + HALDEBUG(ah, HAL_DEBUG_TXQUEUE, "%s: reset queue %u\n", __func__, q); + + if (qi->tqi_cwmin == HAL_TXQ_USEDEFAULT) { + /* + * Select cwmin according to channel type. + * NB: chan can be NULL during attach + */ + if (chan && IEEE80211_IS_CHAN_B(chan)) + chanCwMin = INIT_CWMIN_11B; + else + chanCwMin = INIT_CWMIN; + /* make sure that the CWmin is of the form (2^n - 1) */ + for (cwMin = 1; cwMin < chanCwMin; cwMin = (cwMin << 1) | 1) + ; + } else + cwMin = qi->tqi_cwmin; + + /* set cwMin/Max and AIFS values */ + OS_REG_WRITE(ah, AR_DLCL_IFS(q), + SM(cwMin, AR_D_LCL_IFS_CWMIN) + | SM(qi->tqi_cwmax, AR_D_LCL_IFS_CWMAX) + | SM(qi->tqi_aifs, AR_D_LCL_IFS_AIFS)); + + /* Set retry limit values */ + OS_REG_WRITE(ah, AR_DRETRY_LIMIT(q), + SM(INIT_SSH_RETRY, AR_D_RETRY_LIMIT_STA_SH) + | SM(INIT_SLG_RETRY, AR_D_RETRY_LIMIT_STA_LG) + | SM(qi->tqi_lgretry, AR_D_RETRY_LIMIT_FR_LG) + | SM(qi->tqi_shretry, AR_D_RETRY_LIMIT_FR_SH) + ); + + /* NB: always enable early termination on the QCU */ + qmisc = AR_Q_MISC_DCU_EARLY_TERM_REQ + | SM(AR_Q_MISC_FSP_ASAP, AR_Q_MISC_FSP); + + /* NB: always enable DCU to wait for next fragment from QCU */ + dmisc = AR_D_MISC_FRAG_WAIT_EN; + + /* + * The chip reset default is to use a DCU backoff threshold of 0x2. + * Restore this when programming the DCU MISC register. + */ + dmisc |= 0x2; + + /* multiqueue support */ + if (qi->tqi_cbrPeriod) { + OS_REG_WRITE(ah, AR_QCBRCFG(q), + SM(qi->tqi_cbrPeriod,AR_Q_CBRCFG_CBR_INTERVAL) + | SM(qi->tqi_cbrOverflowLimit, AR_Q_CBRCFG_CBR_OVF_THRESH)); + qmisc = (qmisc &~ AR_Q_MISC_FSP) | AR_Q_MISC_FSP_CBR; + if (qi->tqi_cbrOverflowLimit) + qmisc |= AR_Q_MISC_CBR_EXP_CNTR_LIMIT; + } + if (qi->tqi_readyTime) { + OS_REG_WRITE(ah, AR_QRDYTIMECFG(q), + SM(qi->tqi_readyTime, AR_Q_RDYTIMECFG_INT) + | AR_Q_RDYTIMECFG_ENA); + } + + OS_REG_WRITE(ah, AR_DCHNTIME(q), + SM(qi->tqi_burstTime, AR_D_CHNTIME_DUR) + | (qi->tqi_burstTime ? AR_D_CHNTIME_EN : 0)); + + if (qi->tqi_readyTime && + (qi->tqi_qflags & HAL_TXQ_RDYTIME_EXP_POLICY_ENABLE)) + qmisc |= AR_Q_MISC_RDYTIME_EXP_POLICY; + if (qi->tqi_qflags & HAL_TXQ_DBA_GATED) + qmisc = (qmisc &~ AR_Q_MISC_FSP) | AR_Q_MISC_FSP_DBA_GATED; + if (MS(qmisc, AR_Q_MISC_FSP) != AR_Q_MISC_FSP_ASAP) { + /* + * These are meangingful only when not scheduled asap. + */ + if (qi->tqi_qflags & HAL_TXQ_CBR_DIS_BEMPTY) + qmisc |= AR_Q_MISC_CBR_INCR_DIS0; + else + qmisc &= ~AR_Q_MISC_CBR_INCR_DIS0; + if (qi->tqi_qflags & HAL_TXQ_CBR_DIS_QEMPTY) + qmisc |= AR_Q_MISC_CBR_INCR_DIS1; + else + qmisc &= ~AR_Q_MISC_CBR_INCR_DIS1; + } + + if (qi->tqi_qflags & HAL_TXQ_BACKOFF_DISABLE) + dmisc |= AR_D_MISC_POST_FR_BKOFF_DIS; + if (qi->tqi_qflags & HAL_TXQ_FRAG_BURST_BACKOFF_ENABLE) + dmisc |= AR_D_MISC_FRAG_BKOFF_EN; + if (qi->tqi_qflags & HAL_TXQ_ARB_LOCKOUT_GLOBAL) + dmisc |= SM(AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL, + AR_D_MISC_ARB_LOCKOUT_CNTRL); + else if (qi->tqi_qflags & HAL_TXQ_ARB_LOCKOUT_INTRA) + dmisc |= SM(AR_D_MISC_ARB_LOCKOUT_CNTRL_INTRA_FR, + AR_D_MISC_ARB_LOCKOUT_CNTRL); + if (qi->tqi_qflags & HAL_TXQ_IGNORE_VIRTCOL) + dmisc |= SM(AR_D_MISC_VIR_COL_HANDLING_IGNORE, + AR_D_MISC_VIR_COL_HANDLING); + if (qi->tqi_qflags & HAL_TXQ_SEQNUM_INC_DIS) + dmisc |= AR_D_MISC_SEQ_NUM_INCR_DIS; + + /* + * Fillin type-dependent bits. Most of this can be + * removed by specifying the queue parameters in the + * driver; it's here for backwards compatibility. + */ + switch (qi->tqi_type) { + case HAL_TX_QUEUE_BEACON: /* beacon frames */ + qmisc |= AR_Q_MISC_FSP_DBA_GATED + | AR_Q_MISC_BEACON_USE + | AR_Q_MISC_CBR_INCR_DIS1; + + dmisc |= SM(AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL, + AR_D_MISC_ARB_LOCKOUT_CNTRL) + | AR_D_MISC_BEACON_USE + | AR_D_MISC_POST_FR_BKOFF_DIS; + break; + case HAL_TX_QUEUE_CAB: /* CAB frames */ + /* + * No longer Enable AR_Q_MISC_RDYTIME_EXP_POLICY, + * There is an issue with the CAB Queue + * not properly refreshing the Tx descriptor if + * the TXE clear setting is used. + */ + qmisc |= AR_Q_MISC_FSP_DBA_GATED + | AR_Q_MISC_CBR_INCR_DIS1 + | AR_Q_MISC_CBR_INCR_DIS0; + + if (!qi->tqi_readyTime) { + /* + * NB: don't set default ready time if driver + * has explicitly specified something. This is + * here solely for backwards compatibility. + */ + value = (ahp->ah_beaconInterval + - (ath_hal_sw_beacon_response_time - + ath_hal_dma_beacon_response_time) + - ath_hal_additional_swba_backoff) * 1024; + OS_REG_WRITE(ah, AR_QRDYTIMECFG(q), value | AR_Q_RDYTIMECFG_ENA); + } + dmisc |= SM(AR_D_MISC_ARB_LOCKOUT_CNTRL_GLOBAL, + AR_D_MISC_ARB_LOCKOUT_CNTRL); + break; + default: /* NB: silence compiler */ + break; + } + + OS_REG_WRITE(ah, AR_QMISC(q), qmisc); + OS_REG_WRITE(ah, AR_DMISC(q), dmisc); + + /* Setup compression scratchpad buffer */ + /* + * XXX: calling this asynchronously to queue operation can + * cause unexpected behavior!!! + */ + if (qi->tqi_physCompBuf) { + HALASSERT(qi->tqi_type == HAL_TX_QUEUE_DATA || + qi->tqi_type == HAL_TX_QUEUE_UAPSD); + OS_REG_WRITE(ah, AR_Q_CBBS, (80 + 2*q)); + OS_REG_WRITE(ah, AR_Q_CBBA, qi->tqi_physCompBuf); + OS_REG_WRITE(ah, AR_Q_CBC, HAL_COMP_BUF_MAX_SIZE/1024); + OS_REG_WRITE(ah, AR_Q0_MISC + 4*q, + OS_REG_READ(ah, AR_Q0_MISC + 4*q) + | AR_Q_MISC_QCU_COMP_EN); + } + + /* + * Always update the secondary interrupt mask registers - this + * could be a new queue getting enabled in a running system or + * hw getting re-initialized during a reset! + * + * Since we don't differentiate between tx interrupts corresponding + * to individual queues - secondary tx mask regs are always unmasked; + * tx interrupts are enabled/disabled for all queues collectively + * using the primary mask reg + */ + if (qi->tqi_qflags & HAL_TXQ_TXOKINT_ENABLE) + ahp->ah_txOkInterruptMask |= 1 << q; + else + ahp->ah_txOkInterruptMask &= ~(1 << q); + if (qi->tqi_qflags & HAL_TXQ_TXERRINT_ENABLE) + ahp->ah_txErrInterruptMask |= 1 << q; + else + ahp->ah_txErrInterruptMask &= ~(1 << q); + if (qi->tqi_qflags & HAL_TXQ_TXDESCINT_ENABLE) + ahp->ah_txDescInterruptMask |= 1 << q; + else + ahp->ah_txDescInterruptMask &= ~(1 << q); + if (qi->tqi_qflags & HAL_TXQ_TXEOLINT_ENABLE) + ahp->ah_txEolInterruptMask |= 1 << q; + else + ahp->ah_txEolInterruptMask &= ~(1 << q); + if (qi->tqi_qflags & HAL_TXQ_TXURNINT_ENABLE) + ahp->ah_txUrnInterruptMask |= 1 << q; + else + ahp->ah_txUrnInterruptMask &= ~(1 << q); + setTxQInterrupts(ah, qi); + + return AH_TRUE; +} Modified: projects/altix/sys/dev/e1000/if_em.h ============================================================================== --- projects/altix/sys/dev/e1000/if_em.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/e1000/if_em.h Mon Mar 21 02:15:12 2011 (r219810) @@ -212,7 +212,7 @@ #define EM_BAR_MEM_TYPE_64BIT 0x00000004 #define EM_MSIX_BAR 3 /* On 82575 */ -#if !defined(SYSTCL_ADD_UQUAD) +#if !defined(SYSCTL_ADD_UQUAD) #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD #endif Modified: projects/altix/sys/dev/e1000/if_lem.h ============================================================================== --- projects/altix/sys/dev/e1000/if_lem.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/e1000/if_lem.h Mon Mar 21 02:15:12 2011 (r219810) @@ -217,7 +217,7 @@ #define EM_BAR_MEM_TYPE_64BIT 0x00000004 #define EM_MSIX_BAR 3 /* On 82575 */ -#if !defined(SYSTCL_ADD_UQUAD) +#if !defined(SYSCTL_ADD_UQUAD) #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD #endif Modified: projects/altix/sys/dev/vte/if_vte.c ============================================================================== --- projects/altix/sys/dev/vte/if_vte.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/vte/if_vte.c Mon Mar 21 02:15:12 2011 (r219810) @@ -1963,9 +1963,10 @@ vte_rxfilter(struct vte_softc *sc) } mcr = CSR_READ_2(sc, VTE_MCR0); - mcr &= ~(MCR0_PROMISC | MCR0_BROADCAST | MCR0_MULTICAST); + mcr &= ~(MCR0_PROMISC | MCR0_MULTICAST); + mcr |= MCR0_BROADCAST_DIS; if ((ifp->if_flags & IFF_BROADCAST) != 0) - mcr |= MCR0_BROADCAST; + mcr &= ~MCR0_BROADCAST_DIS; if ((ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) != 0) { if ((ifp->if_flags & IFF_PROMISC) != 0) mcr |= MCR0_PROMISC; Modified: projects/altix/sys/dev/vte/if_vtereg.h ============================================================================== --- projects/altix/sys/dev/vte/if_vtereg.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/dev/vte/if_vtereg.h Mon Mar 21 02:15:12 2011 (r219810) @@ -48,7 +48,7 @@ #define MCR0_ACCPT_LONG_PKT 0x0008 #define MCR0_ACCPT_DRIBBLE 0x0010 #define MCR0_PROMISC 0x0020 -#define MCR0_BROADCAST 0x0040 +#define MCR0_BROADCAST_DIS 0x0040 #define MCR0_RX_EARLY_INTR 0x0080 #define MCR0_MULTICAST 0x0100 #define MCR0_FC_ENB 0x0200 Modified: projects/altix/sys/i386/conf/GENERIC ============================================================================== --- projects/altix/sys/i386/conf/GENERIC Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/i386/conf/GENERIC Mon Mar 21 02:15:12 2011 (r219810) @@ -62,7 +62,6 @@ options KBD_INSTALL_CDEV # install a CD options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) options AUDIT # Security event auditing options MAC # TrustedBSD MAC Framework -options FLOWTABLE # per-cpu routing cache #options KDTRACE_HOOKS # Kernel DTrace hooks options INCLUDE_CONFIG_FILE # Include this file in kernel Modified: projects/altix/sys/ia64/conf/GENERIC ============================================================================== --- projects/altix/sys/ia64/conf/GENERIC Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/ia64/conf/GENERIC Mon Mar 21 02:15:12 2011 (r219810) @@ -31,8 +31,6 @@ options COMPAT_FREEBSD7 # Compatible wi options DDB # Support DDB options DEADLKRES # Enable the deadlock resolver options FFS # Berkeley Fast Filesystem -#options FLOWTABLE # per-cpu routing cache (removed due to - # misaligned access -- see kern/148018) options GDB # Support remote GDB options GEOM_LABEL # Provides labelization options INCLUDE_CONFIG_FILE # Include this file in kernel Modified: projects/altix/sys/ia64/ia64/db_machdep.c ============================================================================== --- projects/altix/sys/ia64/ia64/db_machdep.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/ia64/ia64/db_machdep.c Mon Mar 21 02:15:12 2011 (r219810) @@ -260,7 +260,7 @@ db_backtrace(struct thread *td, struct p sym = db_search_symbol(ip, DB_STGY_ANY, &offset); db_symbol_values(sym, &name, NULL); db_printf("%s(", name); - if (bsp >= IA64_RR_BASE(5)) { + if (bsp >= VM_MAXUSER_ADDRESS) { for (i = 0; i < args; i++) { if ((bsp & 0x1ff) == 0x1f8) bsp += 8; @@ -279,12 +279,12 @@ db_backtrace(struct thread *td, struct p if (error != ERESTART) continue; - if (sp < IA64_RR_BASE(5)) + if (sp < VM_MAXUSER_ADDRESS) break; tf = (struct trapframe *)(sp + 16); if ((tf->tf_flags & FRAME_SYSCALL) != 0 || - tf->tf_special.iip < IA64_RR_BASE(5)) + tf->tf_special.iip < VM_MAXUSER_ADDRESS) break; /* XXX ask if we should unwind across the trapframe. */ Modified: projects/altix/sys/ia64/ia64/gdb_machdep.c ============================================================================== --- projects/altix/sys/ia64/ia64/gdb_machdep.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/ia64/ia64/gdb_machdep.c Mon Mar 21 02:15:12 2011 (r219810) @@ -177,7 +177,7 @@ gdb_cpu_query(void) * kernel stack address. See also ptrace_machdep(). */ bspstore = kdb_frame->tf_special.bspstore; - kstack = (bspstore >= IA64_RR_BASE(5)) ? (uint64_t*)bspstore : + kstack = (bspstore >= VM_MAXUSER_ADDRESS) ? (uint64_t*)bspstore : (uint64_t*)(kdb_thread->td_kstack + (bspstore & 0x1ffUL)); gdb_tx_begin('\0'); gdb_tx_mem((void*)(kstack + slot), 8); Modified: projects/altix/sys/ia64/ia64/pmap.c ============================================================================== --- projects/altix/sys/ia64/ia64/pmap.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/ia64/ia64/pmap.c Mon Mar 21 02:15:12 2011 (r219810) @@ -102,11 +102,11 @@ __FBSDID("$FreeBSD$"); * We reserve region ID 0 for the kernel and allocate the remaining * IDs for user pmaps. * - * Region 0..3: User virtually mapped [VHPT] - * Region 4: Pre-Boot Virtual Memory (PBVM) and wired mappings [non-VHPT] - * Region 5: Kernel Virtual Memory (KVM) [VHPT] - * Region 6: Uncacheable identity mappings [non-VHPT] - * Region 7: Cacheable identity mappings [non-VHPT] + * Region 0-3: User virtually mapped + * Region 4: PBVM and special mappings + * Region 5: Kernel virtual memory + * Region 6: Direct-mapped uncacheable + * Region 7: Direct-mapped cacheable */ /* XXX move to a header. */ @@ -450,12 +450,12 @@ pmap_bootstrap() * Initialize the kernel pmap (which is statically allocated). */ PMAP_LOCK_INIT(kernel_pmap); - for (i = 0; i < 4; i++) + for (i = 0; i < IA64_VM_MINKERN_REGION; i++) kernel_pmap->pm_rid[i] = 0; TAILQ_INIT(&kernel_pmap->pm_pvlist); PCPU_SET(md.current_pmap, kernel_pmap); - /* Region 5 is mapped via the vhpt. */ + /* Region 5 is mapped via the VHPT. */ ia64_set_rr(IA64_RR_BASE(5), (5 << 8) | (PAGE_SHIFT << 2) | 1); /* @@ -664,7 +664,7 @@ pmap_pinit(struct pmap *pmap) int i; PMAP_LOCK_INIT(pmap); - for (i = 0; i < 4; i++) + for (i = 0; i < IA64_VM_MINKERN_REGION; i++) pmap->pm_rid[i] = pmap_allocate_rid(); TAILQ_INIT(&pmap->pm_pvlist); bzero(&pmap->pm_stats, sizeof pmap->pm_stats); @@ -685,7 +685,7 @@ pmap_release(pmap_t pmap) { int i; - for (i = 0; i < 4; i++) + for (i = 0; i < IA64_VM_MINKERN_REGION; i++) if (pmap->pm_rid[i]) pmap_free_rid(pmap->pm_rid[i]); PMAP_LOCK_DESTROY(pmap); @@ -1206,7 +1206,7 @@ pmap_kextract(vm_offset_t va) { struct ia64_lpte *pte; - KASSERT(va >= IA64_RR_BASE(5), ("Must be kernel VA")); + KASSERT(va >= VM_MAXUSER_ADDRESS, ("Must be kernel VA")); /* Regions 6 and 7 are direct mapped. */ if (va >= IA64_RR_BASE(6)) @@ -2267,12 +2267,12 @@ pmap_switch(pmap_t pm) if (prevpm == pm) goto out; if (pm == NULL) { - for (i = 0; i < 4; i++) { + for (i = 0; i < IA64_VM_MINKERN_REGION; i++) { ia64_set_rr(IA64_RR_BASE(i), (i << 8)|(PAGE_SHIFT << 2)|1); } } else { - for (i = 0; i < 4; i++) { + for (i = 0; i < IA64_VM_MINKERN_REGION; i++) { ia64_set_rr(IA64_RR_BASE(i), (pm->pm_rid[i] << 8)|(PAGE_SHIFT << 2)|1); } Modified: projects/altix/sys/ia64/include/pmap.h ============================================================================== --- projects/altix/sys/ia64/include/pmap.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/ia64/include/pmap.h Mon Mar 21 02:15:12 2011 (r219810) @@ -50,6 +50,7 @@ #include <sys/_mutex.h> #include <machine/atomic.h> #include <machine/pte.h> +#include <machine/vmparam.h> #ifdef _KERNEL @@ -75,7 +76,7 @@ struct md_page { struct pmap { struct mtx pm_mtx; TAILQ_HEAD(,pv_entry) pm_pvlist; /* list of mappings in pmap */ - uint32_t pm_rid[5]; /* base RID for pmap */ + uint32_t pm_rid[IA64_VM_MINKERN_REGION]; struct pmap_statistics pm_stats; /* pmap statistics */ }; Modified: projects/altix/sys/ia64/include/vmparam.h ============================================================================== --- projects/altix/sys/ia64/include/vmparam.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/ia64/include/vmparam.h Mon Mar 21 02:15:12 2011 (r219810) @@ -42,12 +42,6 @@ #define _MACHINE_VMPARAM_H_ /* - * USRSTACK is the top (end) of the user stack. Immediately above the user - * stack resides the syscall gateway page. - */ -#define USRSTACK VM_MAXUSER_ADDRESS - -/* * Virtual memory related constants, all in bytes */ #ifndef MAXTSIZ @@ -122,6 +116,8 @@ #define VM_NRESERVLEVEL 0 #endif +#define IA64_VM_MINKERN_REGION 4 + /* * Manipulating region bits of an address. */ @@ -139,12 +135,8 @@ * to 0x1ffbffffffffffff. We define the top half of a region in terms of * this worst-case gap. */ -#define IA64_REGION_TOP_HALF 0x1ffc000000000000 - -/* Place the backing store in the top of half if region 0. */ -#define IA64_BACKINGSTORE IA64_REGION_TOP_HALF - -#define VM_GATEWAY_SIZE PAGE_SIZE +#define IA64_REGION_GAP_START 0x0004000000000000 +#define IA64_REGION_GAP_EXTEND 0x1ffc000000000000 /* * Parameters for Pre-Boot Virtual Memory (PBVM). @@ -170,9 +162,9 @@ * and wired into the CPU, but does not assume that the mapping covers the * whole of PBVM. */ -#define IA64_PBVM_RR 4 +#define IA64_PBVM_RR IA64_VM_MINKERN_REGION #define IA64_PBVM_BASE \ - (IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_TOP_HALF) + (IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_GAP_EXTEND) #define IA64_PBVM_PGTBL_MAXSZ 1048576 #define IA64_PBVM_PGTBL \ @@ -188,13 +180,20 @@ /* user/kernel map constants */ #define VM_MIN_ADDRESS 0 -#define VM_MAXUSER_ADDRESS IA64_RR_BASE(IA64_PBVM_RR) -#define VM_MIN_KERNEL_ADDRESS IA64_RR_BASE(5) -#define VM_MAX_KERNEL_ADDRESS (IA64_RR_BASE(6) - 1) +#define VM_MAXUSER_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION) +#define VM_MIN_KERNEL_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION + 1) +#define VM_MAX_KERNEL_ADDRESS (IA64_RR_BASE(IA64_VM_MINKERN_REGION + 2) - 1) #define VM_MAX_ADDRESS ~0UL #define KERNBASE VM_MAXUSER_ADDRESS +/* + * USRSTACK is the top (end) of the user stack. Immediately above the user + * stack resides the syscall gateway page. + */ +#define USRSTACK VM_MAXUSER_ADDRESS +#define IA64_BACKINGSTORE (USRSTACK - (2 * MAXSSIZ) - PAGE_SIZE) + /* virtual sizes (bytes) for various kernel submaps */ #ifndef VM_KMEM_SIZE #define VM_KMEM_SIZE (12 * 1024 * 1024) Modified: projects/altix/sys/kern/sys_pipe.c ============================================================================== --- projects/altix/sys/kern/sys_pipe.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/kern/sys_pipe.c Mon Mar 21 02:15:12 2011 (r219810) @@ -29,9 +29,9 @@ * write mode. The small write mode acts like conventional pipes with * a kernel buffer. If the buffer is less than PIPE_MINDIRECT, then the * "normal" pipe buffering is done. If the buffer is between PIPE_MINDIRECT - * and PIPE_SIZE in size, it is fully mapped and wired into the kernel, and - * the receiving process can copy it directly from the pages in the sending - * process. + * and PIPE_SIZE in size, the sending process pins the underlying pages in + * memory, and the receiving process copies directly from these pinned pages + * in the sending process. * * If the sending process receives a signal, it is possible that it will * go away, and certainly its address space can change, because control Modified: projects/altix/sys/mips/conf/OCTEON1 ============================================================================== --- projects/altix/sys/mips/conf/OCTEON1 Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/mips/conf/OCTEON1 Mon Mar 21 02:15:12 2011 (r219810) @@ -73,7 +73,6 @@ options PRINTF_BUFR_SIZE=128 # Prevent options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) options AUDIT # Security event auditing options MAC # TrustedBSD MAC Framework -options FLOWTABLE # per-cpu routing cache #options KDTRACE_FRAME # Ensure frames are compiled in #options KDTRACE_HOOKS # Kernel DTrace hooks options INCLUDE_CONFIG_FILE # Include this file in kernel Modified: projects/altix/sys/modules/ufs/Makefile ============================================================================== --- projects/altix/sys/modules/ufs/Makefile Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/modules/ufs/Makefile Mon Mar 21 02:15:12 2011 (r219810) @@ -3,8 +3,7 @@ .PATH: ${.CURDIR}/../../ufs/ufs ${.CURDIR}/../../ufs/ffs KMOD= ufs -SRCS= opt_ddb.h opt_directio.h opt_ffs.h opt_ffs_broken_fixme.h \ - opt_quota.h opt_suiddir.h opt_ufs.h \ +SRCS= opt_ddb.h opt_directio.h opt_ffs.h opt_quota.h opt_suiddir.h opt_ufs.h \ vnode_if.h ufs_acl.c ufs_bmap.c ufs_dirhash.c ufs_extattr.c \ ufs_gjournal.c ufs_inode.c ufs_lookup.c ufs_quota.c ufs_vfsops.c \ ufs_vnops.c ffs_alloc.c ffs_balloc.c ffs_inode.c ffs_snapshot.c \ Modified: projects/altix/sys/net/route.c ============================================================================== --- projects/altix/sys/net/route.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/net/route.c Mon Mar 21 02:15:12 2011 (r219810) @@ -338,7 +338,6 @@ rtalloc1_fib(struct sockaddr *dst, int r u_int fibnum) { struct radix_node_head *rnh; - struct rtentry *rt; struct radix_node *rn; struct rtentry *newrt; struct rt_addrinfo info; @@ -350,13 +349,12 @@ rtalloc1_fib(struct sockaddr *dst, int r fibnum = 0; rnh = rt_tables_get_rnh(fibnum, dst->sa_family); newrt = NULL; + if (rnh == NULL) + goto miss; + /* * Look up the address in the table for that Address Family */ - if (rnh == NULL) { - V_rtstat.rts_unreach++; - goto miss; - } needlock = !(ignflags & RTF_RNH_LOCKED); if (needlock) RADIX_NODE_HEAD_RLOCK(rnh); @@ -366,7 +364,7 @@ rtalloc1_fib(struct sockaddr *dst, int r #endif rn = rnh->rnh_matchaddr(dst, rnh); if (rn && ((rn->rn_flags & RNF_ROOT) == 0)) { - newrt = rt = RNTORT(rn); + newrt = RNTORT(rn); RT_LOCK(newrt); RT_ADDREF(newrt); if (needlock) @@ -381,8 +379,9 @@ rtalloc1_fib(struct sockaddr *dst, int r * Which basically means * "caint get there frm here" */ - V_rtstat.rts_unreach++; miss: + V_rtstat.rts_unreach++; + if (report) { /* * If required, report the failure to the supervising Modified: projects/altix/sys/net/route.h ============================================================================== --- projects/altix/sys/net/route.h Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/net/route.h Mon Mar 21 02:15:12 2011 (r219810) @@ -325,7 +325,6 @@ struct rt_addrinfo { #define RT_LOCK_INIT(_rt) \ mtx_init(&(_rt)->rt_mtx, "rtentry", NULL, MTX_DEF | MTX_DUPOK) #define RT_LOCK(_rt) mtx_lock(&(_rt)->rt_mtx) -#define RT_TRYLOCK(_rt) mtx_trylock(&(_rt)->rt_mtx) #define RT_UNLOCK(_rt) mtx_unlock(&(_rt)->rt_mtx) #define RT_LOCK_DESTROY(_rt) mtx_destroy(&(_rt)->rt_mtx) #define RT_LOCK_ASSERT(_rt) mtx_assert(&(_rt)->rt_mtx, MA_OWNED) @@ -360,22 +359,6 @@ struct rt_addrinfo { RTFREE_LOCKED(_rt); \ } while (0) -#define RT_TEMP_UNLOCK(_rt) do { \ - RT_ADDREF(_rt); \ - RT_UNLOCK(_rt); \ -} while (0) - -#define RT_RELOCK(_rt) do { \ - RT_LOCK(_rt); \ - if ((_rt)->rt_refcnt <= 1) { \ - rtfree(_rt); \ - _rt = 0; /* signal that it went away */ \ - } else { \ - RT_REMREF(_rt); \ - /* note that _rt is still valid */ \ - } \ -} while (0) - struct radix_node_head *rt_tables_get_rnh(int, int); struct ifmultiaddr; Modified: projects/altix/sys/netgraph/ng_iface.c ============================================================================== --- projects/altix/sys/netgraph/ng_iface.c Mon Mar 21 02:06:59 2011 (r219809) +++ projects/altix/sys/netgraph/ng_iface.c Mon Mar 21 02:15:12 2011 (r219810) @@ -286,12 +286,11 @@ static int ng_iface_ioctl(struct ifnet *ifp, u_long command, caddr_t data) { struct ifreq *const ifr = (struct ifreq *) data; - int s, error = 0; + int error = 0; #ifdef DEBUG *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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