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Date:      Sat, 18 Apr 2009 16:33:39 -0400
From:      Chuck Robey <chuckr@telenix.org>
To:        Mark Tinguely <tinguely@casselton.net>
Cc:        gballet@gmail.com, freebsd-arm@freebsd.org, ticso@cicely.de
Subject:   Re: Pandora
Message-ID:  <49EA3923.5090800@telenix.org>
In-Reply-To: <200904181942.n3IJg5Yi097493@casselton.net>
References:  <200904181942.n3IJg5Yi097493@casselton.net>

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Mark Tinguely wrote:
>>  Mark Tinguely wrote:
>>  > He is not in error talking about previous versions of the ARM.
>>  Didn't want to sound like I was arguing, more like I didn't know, but it flew in
>>  the face of what I'd thought, so I needed to find out.
> 
> no offense detected nor taken.
> 
> <my stuff removed>
>>  OK, then, I'll hunt around for whatever I can find to compare the armv6 with armv7.
> 
> I just looked at the OMAP glossy doc even says :
> 
> 	Fully Software-Compatible With C64x and ARM9.
> 
> ARM9 is ARMv5.
> 
>>  OTOH, I didn't think of virtual machine usages when I read it, and NOW I've
>>  found a good tech ref for the arm-v7a, so I will know it for sure in a little while.

Well, i've seen in a whole lot of places that the OMPA3530 is Armv7a, so I'll
just list ouit he first 3 places that I find that disagree with yours, ok?

First, the BBSRM (BeagleBoard System Reference Manual, which is supposed to be
the OMAP3530 also), look to page 135, at the bottom, the kernel booting example,
where it says:

Linux version 2.6.28-omap1 (root@tiioss) (gcc version 4.2.1 (CodeSourcery
Sourcery G++ Lite
2007q3-51)) #2 Thu Feb 19 12:45:34 IST 2009
CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c5387f
CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache

OK, that's #1, next is this URL from TI:
http://focus.ti.com/docs/prod/folders/print/omap3530.html which says these two
lines:

ARM Cortex™-A8 Core

    * ARMv7 Architecture

OK, that's #2, #3 is a URL from QNX (the Unix vendors):
http://community.qnx.com/sf/wiki/do/viewPage/projects.bsp/wiki/TiOmap3530evm1.0.020080109ReleaseNotes

where about 2.3 of the way down the page, in a boot listing, they say:

Welcome to QNX Neutrino 6.4 on the Texas Instruments OMAP3530 (ARMv7 Cortex-A8
core) EVM Board

Finding lots more of these isn't hard, but I wanted to limit it to one's which
seemed to be authoritative, you understand?


> 
> I did not read it too closely. I was mostly interest in the memory management.
> 
> <my stuff removed>
>>  I didn't realize that the arm6 was a viable branch-point for implementing other
>>  arm methods.  I need to get the tech ref for the arm6, I suppose I'll need to
>>  read them both.
> 
> IMO, the ARM Architecture Manual is the main reference.
> 
> <deletions>  
>> ... from someone who knows VM better than I do, is, or why is, round robin
>> being used in any Arm?  I've been asking various people for 3 years now, and
>> never gotten any good answer, and it bothers me a lot.
> 
> There are other people on this list with better ARM arch insight that I;
> If I remember correctly, the earlier ARM models offered round robin and
> random cache replacement.
> 
> My observation is ARM is a RISC arch. I believe the goal is minimize the
> complexity.
> 
> For example, adding physically tagged caches requires a longer pipe line;
> that means branch predictors are added to keep the pipelines full...

Well, maybe its due to the fact that I haven't done very much in depth study of
VM systems, but I thought, in talking about cache line replacement policies, you
wanted to keep around the lines which are most often used, which (inverting the
logic) means you want, in picking lines to be deleted, to pick via an LRU
algorithm.  I can't see where any round robin system could be used at all,
unless you were going to drop into code each and every time you needed to access
from a new cache line, so you would basically be forced to do your own LRU
implementation. Isn't this true?  If I'm wrong, I won't be insulted if you tell
me "you're full of crap" because this seeming huge mistake's been bothering me
ever since I first spotted it, some years ago in the Xscale.

> 
> --Mark.

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