Date: Wed, 01 Jul 1998 13:55:12 -0700 From: "Jasmine(Yongqi) Wang" <jwang@cs.ubc.ca> To: freebsd-small@FreeBSD.ORG Subject: (no subject) Message-ID: <359AA230.A5D@cs.ubc.ca>
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HI, there, I need to run some test to get an idea of TLB miss rate. I have found out that there is performance monitor counter in Pentium processors. I will run it on Pentium Pro. There are 4 MSRs, two for performance event select and two for counting. also there is RDMSR, WRMSR and RDPMC to use. so in my case the event type should be TLB miss and TLB hit. It's said the way it will work is to 1. set up PerfEvtSel0/1 with wrmsr 2. counter will start if 1 succeed and counter is enabled in above instruction. my questions are: RDMSR and WRMSR are only usable in Kernel mode, so should I make a small kernel or is there alternatives? when get the result back I can use RDPMC, if CR4[PCE]=1, i can get it in user mode; otherwise I can only run in kernel too. but i can't find any instruction to read CR4. There are instructions for CR0, CR2 and CR3, or I am missing sth. here? Thanks for your help, -- Jasmine. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-small" in the body of the message
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