Date: Fri, 29 Nov 2019 00:26:06 +0000 (UTC) From: Alexander Motin <mav@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r355196 - stable/11/sys/dev/ioat Message-ID: <201911290026.xAT0Q68h005166@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: mav Date: Fri Nov 29 00:26:05 2019 New Revision: 355196 URL: https://svnweb.freebsd.org/changeset/base/355196 Log: MFC r354753: Initialize *comp_update with valid value. I've noticed that sometimes with enabled DMAR initial write from device to this address is somehow getting delayed, triggering assertion due to zero default being invalid. Modified: stable/11/sys/dev/ioat/ioat.c Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/dev/ioat/ioat.c ============================================================================== --- stable/11/sys/dev/ioat/ioat.c Fri Nov 29 00:25:39 2019 (r355195) +++ stable/11/sys/dev/ioat/ioat.c Fri Nov 29 00:26:05 2019 (r355196) @@ -535,10 +535,9 @@ ioat3_attach(device_t device) dma_hw_desc->next = RING_PHYS_ADDR(ioat, i + 1); } - ioat->head = 0; - ioat->tail = 0; - ioat->last_seen = 0; - *ioat->comp_update = 0; + ioat->tail = ioat->head = 0; + *ioat->comp_update = ioat->last_seen = + RING_PHYS_ADDR(ioat, ioat->tail - 1); return (0); } @@ -1581,8 +1580,8 @@ ioat_reset_hw(struct ioat_softc *ioat) * at zero as well. */ ioat->tail = ioat->head = 0; - ioat->last_seen = 0; - *ioat->comp_update = 0; + *ioat->comp_update = ioat->last_seen = + RING_PHYS_ADDR(ioat, ioat->tail - 1); ioat_write_chanctrl(ioat, IOAT_CHANCTRL_RUN); ioat_write_chancmp(ioat, ioat->comp_update_bus_addr);
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201911290026.xAT0Q68h005166>