Date: Sat, 4 Oct 1997 22:12:05 +0200 From: Stefan Esser <se@FreeBSD.ORG> To: "Serge A. Babkin" <babkin@hq.icb.chel.su> Cc: hackers@FreeBSD.ORG Subject: Re: PCI slowness ? Message-ID: <19971004221205.63474@mi.uni-koeln.de> In-Reply-To: <199710041405.UAA09967@hq.icb.chel.su>; from Serge A. Babkin on Sat, Oct 04, 1997 at 08:05:25PM %2B0600 References: <199710041405.UAA09967@hq.icb.chel.su>
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On 1997-10-04 20:05 +0600, "Serge A. Babkin" <babkin@hq.icb.chel.su> wrote: > Hi! > > I've made a simple driver to test the SCSI throughput. It takes > 2 NCR53c810A SCSI cards and starts to transfer data between them > at (theoretically) 10MBps synchronous rate. But in fact I get at most > 8.5MBps ! I was able to rase it from 7.5MBps to 8.5MBps > by changing the memory access options in NCRs from simplest > to maximal optimization so probably the PCI or memory > bus limits the throughput. Can anyone suggest me what's > the problem ? You don't tell about your actual setup: 1) transfer length ? 2) did disconnects occur ? 3) does the time measurement include the time to prepare the transfer (which may be hidden in most cases) ? Did you take into account, that FAST SCSI uses a 100ns cycle length, which allows for 10mio B/s, or 9.5MB/s ? If you transfer 64KB blocks (which takes 6.7ms at 10MHz) and the SCSI overhead is 1ms, then you'll see an actual transfer rate of 8.3MB/s. > The chipset is Intel Triton on some chineese motherboard > with 75MHz Pentium, memory is 60ns EDO. > Theoretical PCI throughput is 33M > of 4-byte transfers per second (the card claims to work > in burst mode). Theoretical memory throughput is at least > 10M of 4-byte transfers per second if we suppose that > the memory cycle with all overhead is 100ns and the > card reads by 4 bytes at a time. But the experiment > shows throughput of only 17MBps or 4.25M of 4 byte > transfers. Does the processor eats all the remaining > throughput (although I think it must load most of the > code it runs at idling into the cache) ? The PCI accesses don't limit throughput in your case. But you should allow for large bursts and should make sure, that read-multiple and write-and-invalidate PCI commands are used. What's the setting of the master latency-timer and the NCR latency timers ? Is the cache line size register set correctly ? What's the burst length limit chosen in DMODE ? > And another thing. I know that expensive machines like > DEC Prioris have possibilities to change some PCI > timing parameters for PCI cards. My cheap box does > not have anything like. May be that's the problem ? Which PCI timing parameters ??? You can modify PCI chip set parameters, but most should already be set to best values (i.e. all optimisations should be enabled by default). Increasing the value of the latency timer may improve PCI bus throughput, but its effect is often over-estimated. You should make sure, that the NCR cards are configured correctly, and you should take the into account, that the SCSI standard uses powers of 10, while throughput is measured in MB/s which are based on powers of 2 ... You want to overlap the preparation of the next transfer with the execution of the previous one, and you want to use transfer lengths long enough to hide the SCSI command overhead (which may be as low as 50us, but it takes some effort to get it that low ...). Regards, STefan
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