Date: Mon, 31 Aug 1998 23:51:53 +0000 (GMT) From: Terry Lambert <tlambert@primenet.com> To: bde@zeta.org.au (Bruce Evans) Cc: bde@zeta.org.au, cracauer@cons.org, tlambert@primenet.com, current@FreeBSD.ORG, luoqi@watermarkgroup.com, shocking@prth.pgs.com Subject: Re: Floating Point Exceptions, signal handlers & subsequent ops Message-ID: <199808312351.QAA13074@usr01.primenet.com> In-Reply-To: <199808310359.NAA27283@godzilla.zeta.org.au> from "Bruce Evans" at Aug 31, 98 01:59:21 pm
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> TSS-based context switching > doesn't affect the FPU. I believe Linux uses TSS-based context switching > for the CPU and fully lazy context switching for the FPU. Thanks for the correction... > >I don't understand how not saving the registers could lead to an FPE > >delivered to the wrong process. A process could only leave with > >pending exceptions if it used floating point and in that case its > >registers would have been saved. > > Well, on old86's with a coprocessor, and on new86's with a coprocessor > but still using IRQ13 to report exceptions, the save-context FPU > instructions don't actually work if there is a trap pending - they > cause a trap in the context of the new process. Half of the code > and most of the complications in npx.c are for ignoring this trap. > It occurs instead on the next FPU instruction for the old process, > even that instruction is a control instruction that shouldn't trap. What Bruce said. 8-). I'm very glad I didn't have to dig into the code to answer this for you; realistically, I probably would have punted with "something to do with IRQ13 and the register save kicking a trap in the new process that has to be stored for the old". Now that Bruce is "in the groove"... fully lazy switching? ;-). Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message
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