Date: Thu, 10 Aug 2017 09:04:50 -0700 From: Mark Millard <markmi@dsl-only.net> To: Sylvain Garrigues <sylvain@sylvaingarrigues.com> Cc: freebsd-arm <freebsd-arm@freebsd.org> Subject: Re: armv6 kernel support for Raspberry Pi 3 in default aarch32 mode Message-ID: <11C8C2C2-02FA-493A-816E-5ED0653EAF78@dsl-only.net> In-Reply-To: <CAKT8nAiJBv5mRKPfoiENkw%2B_Vur__AcaK-W%2BDtc50Dgk5_D=3w@mail.gmail.com> References: <CAKT8nAiUYBOzvCoHz_rx4npMVvisqQgQLX1jRWhYzq5hk6wcGQ@mail.gmail.com> <AA7A410C-CED5-48C5-B62F-1FCD679DF317@dsl-only.net> <CAKT8nAgciFjG2iBVCFnUEQEMQ94mi80Sk%2BH_qmG_V31V=ks%2BJg@mail.gmail.com> <8910A9FB-E936-4576-97B1-B2EDCB1ED1AE@dsl-only.net> <CAKT8nAiJBv5mRKPfoiENkw%2B_Vur__AcaK-W%2BDtc50Dgk5_D=3w@mail.gmail.com>
next in thread | previous in thread | raw e-mail | index | archive | help
On 2017-Aug-10, at 6:51 AM, Sylvain Garrigues <sylvain at = sylvaingarrigues.com> wrote: > 2017-08-10 1:58 GMT+02:00 Mark Millard <markmi@dsl-only.net>: >> Overall: Supporting aarch32 is not automatic >> even if one starts from armv7 or specifically >> a cortex-a53 context unless one was lucky >> enough to happen to not touch or depend on >> any of the differences at any stage. >=20 > Thanks. I guess though that it's quite easily feasible for someone = familiar with arm lower level initialization. >=20 > I can see NetBSD managed to make the armv7 kernel boot on Raspberry Pi = 3 with one commit: > Get the RPI3 working (in aarch32 mode) by recognising Cortex A53 CPUs. = - = https://github.com/IIJ-NetBSD/netbsd-src/commit/00335f7adc380a125d045279c1= a0f5525fb557da Interesting. > Same for OpenBSD folks: > http://marc.info/?l=3Dopenbsd-tech&m=3D145692659524971&w=3D2 This one (OpenBSD) says (note the "including some other (still) local diffs"): "This way, and including some other (still) local diffs, I have the brand new raspberry Pi 3 in multiuser: http://ix.io/oJV " So the reference only has some of of the code changes shown. And the boot log shows: cpu0 at mainbus0: ARM Cortex A53 rev 4 (ARMv7 core) cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled cpu0: 32KB(64b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache So just one cpu. But for all I know OpenBSD might not have been SMP capable on a rpi2 at the time either. The boot log also shows: gpio at bcmgpio0 not configured broadcom0: device bcmsdhc unit 0 not found So for OpenBSD the code change shown was just the start of the update as far as I can tell. > Plus FreeBSD's RPI2 armv6 kernel does boot and recognize the = cortex-a53 with qemu-aarch64: > qemu-system-aarch64 -M raspi2 -cpu cortex-a53 -m 1024 -smp 4 -kernel = kernel.bin -serial stdio -dtb rpi2.dtb Interesting. How clean is the boot log? At least for raspbian there were separate files for rpi3 when rpi3 was first supported: arch/arm/boot/dts/bcm2710-rpi-3-b.dts arch/arm/boot/dts/bcm2710.dtsi Later there was: arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts as well as some updates to some of those files. (I'm not sure that I found all such files that are rpi3 specific [possibly covering rpi2v1.2 as well?].) I suspect the qemu-system-aarch64 use is simulating a rpi2's details as listed in rpi2.dtb instead of the rpi3's details. (But using a cortex-a53 CPU model.) There may well be work in supporting the rpi3's details in the kernel and/or boot loading stages for all I know. What happens if a rpi3 dtb file is used instead of rpi2.dtb ? > So I guess we too are really not far to boot RPI2 "armv6" kernel on = raspberry pi 2 v1.2 and raspberry pi 3. > I wish I could help. Since I'm finding these things as I go I've no clue what I've not found. So I can not tell how close to correct you are. =3D=3D=3D Mark Millard markmi at dsl-only.net
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?11C8C2C2-02FA-493A-816E-5ED0653EAF78>