Date: Sun, 31 Mar 2002 10:09:00 -0800 (PST) From: Matthew Dillon <dillon@apollo.backplane.com> To: John Polstra <jdp@polstra.com> Cc: smp@FreeBSD.ORG Subject: Re: RE: Syscall contention tests return, userret() bugs/issues. Message-ID: <200203311809.g2VI90H89605@apollo.backplane.com> References: <XFMail.20020329155622.jhb@FreeBSD.org> <200203292207.g2TM7Fi67491@apollo.backplane.com> <200203311729.g2VHT5h18352@vashon.polstra.com> <200203311747.g2VHlII89488@apollo.backplane.com> <200203311752.g2VHqab18408@vashon.polstra.com>
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:> write-through the processor that does the write will flush the dirty
:> cache line to main memory in fairly short order.
:
:Why do you keep saying the Intel caches are write-through? They've
:been write-back since the Pentium. See table 9-2 in the same document
:I cited before.
:
:John
:--
: John Polstra
Maybe I'm using the wrong terminology. What I mean to say is that
Intel caches, under most conditions, will flush dirty elements in
their caches to main memory very quickly. i.e. unlike, say, the old
68040 cache which leaves dirty cache lines in the cache almost
indefinitely. The intel caches implement a write ordering constraint
and a FIFO to deal with dirty data.
Yes, I guess that would be write-back rather then write-through,
But not delayed-write.
-Matt
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