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Date:      Sun, 31 Mar 2002 10:41:38 -0800 (PST)
From:      John Polstra <jdp@polstra.com>
To:        smp@freebsd.org
Cc:        dillon@apollo.backplane.com
Subject:   Re: RE: Syscall contention tests return, userret() bugs/issues.
Message-ID:  <200203311841.g2VIfcn18637@vashon.polstra.com>
In-Reply-To: <200203311834.g2VIYrt89705@apollo.backplane.com>
References:  <XFMail.20020329155622.jhb@FreeBSD.org> <200203311809.g2VI90H89605@apollo.backplane.com> <200203311817.g2VIHEB18544@vashon.polstra.com> <200203311834.g2VIYrt89705@apollo.backplane.com>

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In article <200203311834.g2VIYrt89705@apollo.backplane.com>,
Matthew Dillon  <dillon@apollo.backplane.com> wrote:
> 
>     Now we are quibbling over terminology.  Intel caches have a write FIFO.
>     They are not a full-blown delayed-write caches.  There is a BIG 
>     difference.  That is, you can't have an arbitrary amount of dirty data
>     sitting in an intel cache.

There is nothing in the Intel documentation which would support that
statement.  The cache is write-back.  Nowhere does the documentation
say anything about dirty lines being flushed to memory except when
required by the cache control protocol (which is pretty standard).

>     This means that a write will be pushed out to main memory in fairly
>     short order.

No, I don't think so.  There is no evidence of that in the Intel
docs.

John
-- 
  John Polstra
  John D. Polstra & Co., Inc.                        Seattle, Washington USA
  "Disappointment is a good sign of basic intelligence."  -- Chögyam Trungpa


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