Date: Tue, 7 Jan 2003 22:10:20 -0500 From: Andrew Gallatin <gallatin@cs.duke.edu> To: John Baldwin <jhb@FreeBSD.org> Cc: cvs-all@FreeBSD.org, cvs-committers@FreeBSD.org Subject: Re: cvs commit: src/sys/i386/i386 mp_machdep.c Message-ID: <20030107221020.A60240@grasshopper.cs.duke.edu> In-Reply-To: <XFMail.20030107204433.jhb@FreeBSD.org>; from jhb@FreeBSD.org on Tue, Jan 07, 2003 at 08:44:33PM -0500 References: <200301080133.h081XI8W028546@repoman.freebsd.org> <XFMail.20030107204433.jhb@FreeBSD.org>
next in thread | previous in thread | raw e-mail | index | archive | help
> CPU: Pentium 4 (686-class CPU) > Origin = "GenuineIntel" > Features=0xffffffffbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,P > GE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE> > Hyperthreading: 2 logical CPUs <...> > For now I am working on reworking the i386 interrupt code so that > using the local and I/O APICs versus using the traditional PICs is > a runtime decision rather than a compile time decision as well as > fixing the mptable code to route PCI interrupts using the > pcib_route_interrupt() method and adding support for enumerating > APICs and CPUs via ACPI. The goal is to put SMP into GENERIC on > i386 to support SMP out of the box and obsolete /sys/i386/conf/SMP. Cool! Will I ever be able to run a system like the following (with no I/O APIC) under FreeBSD/SMP?: CPU: Pentium 4 (2533.43-MHz 686-class CPU) Origin = "GenuineIntel" Id = 0xf24 Stepping = 4 Features=0x3febfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM> <...> acpi_cpu0: <CPU> on acpi0 acpi_cpu1: <CPU> on acpi0 <...> thanks, Drew To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?20030107221020.A60240>