Date: Fri, 15 Aug 2003 15:50:35 +0200 From: Thomas Moestl <t.moestl@tu-bs.de> To: Harti Brandt <brandt@fokus.fraunhofer.de> Cc: sparc64@freebsd.org Subject: Re: Sparc slowdown - problem identified... Message-ID: <20030815135034.GA701@crow.dom2ip.de> In-Reply-To: <20030815121010.I97608@beagle.fokus.fraunhofer.de> References: <20030815121010.I97608@beagle.fokus.fraunhofer.de>
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On Fri, 2003/08/15 at 12:20:39 +0200, Harti Brandt wrote: > > Hi all, > > it seems I have identified which commit causes the slow down on some > sparcs. The kernel from just before that commit works just fine, the > kernel from just after it is 3x slower on my Ultra-10 (as was also > reported by others). I have no idea why that happens. The only difference > in the time -l report is user and system time going up by a factor of > three and the involuntary context switches doubling. It seems that deferred errors (and thus the data access errors generated due to PCI bus timeouts from non-existant devices) will disable the instruction and data cache by resetting the corresponding enable bits in the LSU control register, and the current code fails to reenable them (which also requires a cache flush). A simple workaround for now is to avoid triggering these errors, so enabling OFW_NEWPCI should help. - Thomas -- Thomas Moestl <t.moestl@tu-bs.de> http://www.tu-bs.de/~y0015675/ <tmm@FreeBSD.org> http://people.FreeBSD.org/~tmm/ PGP fingerprint: 1C97 A604 2BD0 E492 51D0 9C0F 1FE6 4F1D 419C 776C
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