Date: Tue, 8 Sep 2009 16:55:55 -0400 From: John Baldwin <jhb@freebsd.org> To: Andriy Gapon <avg@freebsd.org> Cc: freebsd-acpi@freebsd.org Subject: Re: intpm: add support for AMD SBxxx SMBus controller Message-ID: <200909081655.56006.jhb@freebsd.org> In-Reply-To: <4AA6B9FC.1070205@freebsd.org> References: <4AA41D4A.4080805@freebsd.org> <200909081335.50980.jhb@freebsd.org> <4AA6B9FC.1070205@freebsd.org>
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On Tuesday 08 September 2009 4:09:32 pm Andriy Gapon wrote: > on 08/09/2009 20:35 John Baldwin said the following: > > On Sunday 06 September 2009 4:36:26 pm Andriy Gapon wrote: > >> Please review the included patch that adds support from SMBus controller found > >> in AMD SB600/700/710/750 south-bridges (not sure about SB800). > >> As I understand, this controller works only in polling mode, so support for this > >> mode was enabled in the code. > >> > >> There are two places that I was not sure about, so I marked them with XXX. > >> The static variable intsmb_cfg_irq9 would be problematic if there are multiple > >> SMBus controllers in a system. > > > > I would move this into the softc and set it in the attach() routine by > > duplicating that bit of the switch() statement in attach(). > > OK, thank you for the idea. > > >> Also, PCI_INTR_SMB_IRQ_AMD is probably not the best name. Maybe something like > >> PCI_INTR_SMB_IRQ_OTHER or just PCI_INTR_SMB_IRQ would be better? > > > > I would maybe just change the driver to print the value in hex instead of > > bogus and not add a #define for '2'. The PIIX4 datasheet says '2' is a > > reserved value for that field FWIW. > > But, OTOH, SB700 datasheet says '2' is a regular interrupt. > Although it is quite unclear from that datasheet what that interrupt might be > and if interrupt-driven configuration is possible at all. Does it have a valid intpin config register? Maybe '2' means it has a legacy INTx PCI interrupt. -- John Baldwin
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