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Date:      Tue, 22 Sep 2009 16:10:34 +0300
From:      Kostik Belousov <kostikbel@gmail.com>
To:        Larry Baird <lab@gta.com>
Cc:        freebsd-xen@freebsd.org
Subject:   Re: XEN 5.5.0 and clflush
Message-ID:  <20090922131034.GV47688@deviant.kiev.zoral.com.ua>
In-Reply-To: <20090922123401.GB29391@gta.com>
References:  <20090922123401.GB29391@gta.com>

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On Tue, Sep 22, 2009 at 08:34:01AM -0400, Larry Baird wrote:
> I originally sent this message to freebsd-current.  Got no response, perh=
aps
> freebsd-xen is a better mailing list. (-:
>=20
> Since the end of August I have been unable to boot a generic kernel from
> FreeBSD current or 8 under XEN 5.5.0.  Finally had a chance to briefly lo=
ok
> at the problem.  If I apply attached patch to remove calls to clflush() I
> am able to boot current.  Hopefully somebody can shed some light.  Is
> XEN incorrecty reporting CPUID_CLFSH or is XEN not correctly virtualizing
> this option.  Or is the issue someplace else?  I have also attached the
> dmesg from a successful boot.  This issue seems to be same as
> http://www.freebsd.org/cgi/query-pr.cgi?pr=3D138863
>=20
>=20
> Here is an attempt to type backtrace from non-booting kernel:
>=20
> pmap_invalidate_cache_range(c3252000,c3253000,c3253000,0,fee00000,...) at
> +pamp_invalidate_cache_range+0x60
> pmap_mapdev_attr(fee00000,400,0,c1420d34,c0ba7a72,...) at pmap_mapdev_att=
r+0xec
> pmap_mapdev() at pmap_mapdev+0x20
> lapic_init() at lapic_init+0x32
> madt_setup_local() at madt_setup_local+0x2c
> apic_init() at apic_init+0x11a
> mistartup() at mi_startup+0x96
> begin() at begin+0x2c

I am sorry for delay in answering, you may use this temporal patch until
the issue is resolved somehow.

I think I will have to disable CLFLUSH support for intel CPUs when self-sno=
op
is not reported.

diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c
index 1f37765..7de1ca5 100644
--- a/sys/amd64/amd64/pmap.c
+++ b/sys/amd64/amd64/pmap.c
@@ -997,7 +997,7 @@ pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_=
t eva)
=20
 	if (cpu_feature & CPUID_SS)
 		; /* If "Self Snoop" is supported, do nothing. */
-	else if (cpu_feature & CPUID_CLFSH) {
+	else if (0 && cpu_feature & CPUID_CLFSH) {
=20
 		/*
 		 * Otherwise, do per-cache line flush.  Use the mfence
diff --git a/sys/i386/i386/pmap.c b/sys/i386/i386/pmap.c
index 7e3bc37..56c6776 100644
--- a/sys/i386/i386/pmap.c
+++ b/sys/i386/i386/pmap.c
@@ -994,7 +994,7 @@ pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_=
t eva)
=20
 	if (cpu_feature & CPUID_SS)
 		; /* If "Self Snoop" is supported, do nothing. */
-	else if (cpu_feature & CPUID_CLFSH) {
+	else if (0 && cpu_feature & CPUID_CLFSH) {
=20
 		/*
 		 * Otherwise, do per-cache line flush.  Use the mfence
diff --git a/sys/i386/xen/pmap.c b/sys/i386/xen/pmap.c
index 1d9c9c1..7dc8029 100644
--- a/sys/i386/xen/pmap.c
+++ b/sys/i386/xen/pmap.c
@@ -994,7 +994,7 @@ pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_=
t eva)
=20
 	if (cpu_feature & CPUID_SS)
 		; /* If "Self Snoop" is supported, do nothing. */
-	else if (cpu_feature & CPUID_CLFSH) {
+	else if (0 && cpu_feature & CPUID_CLFSH) {
=20
 		/*
 		 * Otherwise, do per-cache line flush.  Use the mfence

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