Date: Mon, 20 Jan 2014 12:33:51 +0100 From: Daan Vreeken <Daan@vitsch.nl> To: Freebsd-MIPS@freebsd.org Subject: AR724x register definition bug Message-ID: <201401201233.51239.Daan@vitsch.nl>
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--Boundary-00=_fmQ3Shp8wllm7GZ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi MIPS hackers, At this moment I am working to get FreeBSD to boot on the RB711-2HnD. While digging through the code, I noticed a bug in ar724xreg.h . The bitmask of a number of bits is spelled in the wrong order. Attached is a patch to fix this. In case the patch gets cut-off, it can also be found here : http://www.vitsch.nl/pub_diffs/ Could anyone take a look at the patch and commit it? Thanks, -- Ing. Daan Vreeken Vitsch Electronics http://Vitsch.nl/ http://VitschVPN.nl/ tel: +31-(0)40-7113051 KvK nr: 17174380 -- Machines en netwerken op afstand beheren? Vitsch VPN oplossing! Kijk voor meer informatie op: http://www.VitschVPN.nl/ --Boundary-00=_fmQ3Shp8wllm7GZ Content-Type: text/plain; charset="us-ascii"; name="patch_ar724xreg_2014_01_20.diff" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="patch_ar724xreg_2014_01_20.diff" Index: sys/mips/atheros/ar724xreg.h =================================================================== --- sys/mips/atheros/ar724xreg.h (revision 260504) +++ sys/mips/atheros/ar724xreg.h (working copy) @@ -87,22 +87,22 @@ #define AR724X_PCI_INTR_MASK 0x180f0050 #define AR724X_PCI_INTR_DEV0 (1 << 14) -#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN (1 >> 19) -#define AR724X_GPIO_FUNC_SPI_EN (1 >> 18) -#define AR724X_GPIO_FUNC_SPI_CS_EN2 (1 >> 14) -#define AR724X_GPIO_FUNC_SPI_CS_EN1 (1 >> 13) -#define AR724X_GPIO_FUNC_CLK_OBS5_EN (1 >> 12) -#define AR724X_GPIO_FUNC_CLK_OBS4_EN (1 >> 11) -#define AR724X_GPIO_FUNC_CLK_OBS3_EN (1 >> 10) -#define AR724X_GPIO_FUNC_CLK_OBS2_EN (1 >> 9) -#define AR724X_GPIO_FUNC_CLK_OBS1_EN (1 >> 8) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN (1 >> 7) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN (1 >> 6) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN (1 >> 5) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN (1 >> 4) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN (1 >> 3) -#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN (1 >> 2) -#define AR724X_GPIO_FUNC_UART_EN (1 >> 1) -#define AR724X_GPIO_FUNC_JTAG_DISABLE (1 >> 0) +#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN (1 << 19) +#define AR724X_GPIO_FUNC_SPI_EN (1 << 18) +#define AR724X_GPIO_FUNC_SPI_CS_EN2 (1 << 14) +#define AR724X_GPIO_FUNC_SPI_CS_EN1 (1 << 13) +#define AR724X_GPIO_FUNC_CLK_OBS5_EN (1 << 12) +#define AR724X_GPIO_FUNC_CLK_OBS4_EN (1 << 11) +#define AR724X_GPIO_FUNC_CLK_OBS3_EN (1 << 10) +#define AR724X_GPIO_FUNC_CLK_OBS2_EN (1 << 9) +#define AR724X_GPIO_FUNC_CLK_OBS1_EN (1 << 8) +#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN (1 << 7) +#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN (1 << 6) +#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN (1 << 5) +#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN (1 << 4) +#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN (1 << 3) +#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN (1 << 2) +#define AR724X_GPIO_FUNC_UART_EN (1 << 1) +#define AR724X_GPIO_FUNC_JTAG_DISABLE (1 << 0) #endif --Boundary-00=_fmQ3Shp8wllm7GZ--
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