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Date:      Sun, 27 Oct 2019 23:29:56 +0100
From:      Milan Obuch <freebsd-hackers@dino.sk>
To:        Oliver Pinter <oliver.pinter@hardenedbsd.org>
Cc:        freebsd-hackers@freebsd.org
Subject:   Re: UART driver as kld - how?
Message-ID:  <20191027232956.28b11772@zeta.dino.sk>
In-Reply-To: <CAPQ4ffuoHRFghwo=okFoNVHw9TYdwFw_wgUxa5_rm6FqjsNVsg@mail.gmail.com>
References:  <20191027214209.712d62ca@zeta.dino.sk> <CAPQ4ffuoHRFghwo=okFoNVHw9TYdwFw_wgUxa5_rm6FqjsNVsg@mail.gmail.com>

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On Sun, 27 Oct 2019 22:52:10 +0100
Oliver Pinter <oliver.pinter@hardenedbsd.org> wrote:

> On Sunday, October 27, 2019, Milan Obuch <freebsd-hackers@dino.sk>
> wrote:
> 
> > Hi,
> >
> > I am trying to create a driver for Xilinx' AXI UART Lite IP core. I
> > can't find a way to do it as kld module. I started with
> > uart_dev_cdnc.c, but I can't see how it is hooked into the kernel -
> > or, better formulated, how can I created kld loadable module. As
> > Zynq has uart_dev_cdnc driver for its PS UART, all necessary files
> > are compiled into kernel, but how can I extend those modules tables
> > to work with new driver too?
> >
> > You can ask why I want it this way, if I can put this into kernel...
> > simply this would make development awkward - every change would mean
> > recompile everything (or at least relinking kernel) and reboot. With
> > kld, I can just rebuild the module, reinstall it, unload old/load
> > new version and test. Other thing is, for any IP core I must first
> > load hw design into PL part (FPGA bitstream, actually), there is
> > simply no device without this step performed.
> >
> > Did anybody already create something similar? Any help/hint/pointer
> > appreciated...  
> 
> 
> https://github.com/freebsd/freebsd/tree/master/share/examples/kld
> 

Hi,

my problem is somewhere else - I am able to build kld, load and unload
it, but in all uart_dev_xxxx.c files I saw there are no attach and
detach function, so there must be something more to do. On the other
side, uart_core.o is already present in kernel, but how should I make
it work with newly loaded module? uart_bus_fdt.o is linked in kernel
too, and there are attach and detach function, but how can my tables be
added in list for it?

Regards,
Milan



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