Date: Tue, 6 Apr 2010 09:04:18 +0000 (UTC) From: Juli Mallett <jmallett@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r206256 - user/jmallett/octeon/sys/mips/mips Message-ID: <201004060904.o3694IIp005633@svn.freebsd.org>
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Author: jmallett Date: Tue Apr 6 09:04:18 2010 New Revision: 206256 URL: http://svn.freebsd.org/changeset/base/206256 Log: o) Use CLEAR_STATUS rather than mtc0 zero, cp0_status, since the latter would disable all sorts of bits we care about. Modified: user/jmallett/octeon/sys/mips/mips/exception.S Modified: user/jmallett/octeon/sys/mips/mips/exception.S ============================================================================== --- user/jmallett/octeon/sys/mips/mips/exception.S Tue Apr 6 08:35:04 2010 (r206255) +++ user/jmallett/octeon/sys/mips/mips/exception.S Tue Apr 6 09:04:18 2010 (r206256) @@ -252,7 +252,7 @@ SlowFault: and a0, a0, a2 ; \ mtc0 a0, COP_0_STATUS_REG #endif - + /* * Save CPU and CP0 register state. * @@ -317,7 +317,7 @@ SlowFault: REG_L reg, CALLFRAME_SIZ + (SZREG * offs) (base) #define RESTORE_CPU \ - mtc0 zero,COP_0_STATUS_REG ;\ + CLEAR_STATUS ;\ RESTORE_REG(k0, SR, sp) ;\ RESTORE_REG(t0, MULLO, sp) ;\ RESTORE_REG(t1, MULHI, sp) ;\
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