Skip site navigation (1)Skip section navigation (2)
Date:      Mon, 26 Feb 1996 13:22:21 -0700 (MST)
From:      Terry Lambert <terry@lambert.org>
To:        narvi@haldjas.folklore.ee (Narvi)
Cc:        phk@critter.tfs.com, jehamby@lightside.com, hackers@FreeBSD.org
Subject:   Re: Go SCSI! Big improvement...
Message-ID:  <199602262022.NAA02490@phaeton.artisoft.com>
In-Reply-To: <Pine.BSF.3.91.960226122755.4329A-100000@haldjas.folklore.ee> from "Narvi" at Feb 26, 96 12:39:08 pm

next in thread | previous in thread | raw e-mail | index | archive | help
> > Only very carefully selected combinations can run with all three slots
> > populated, and only seldom at full speed.
>
> OK. Most implementations do restrict the population of the VLB slots, 
> most notably with max 2 bus-masters. Still, a configuration with a VLB 
> GUI accelerator, a VLB IDE and a SCSI busmaster should work in most 
> cases. But of course, it may not.

Most VLB motherboards have a single bus master slot, the one closest
to the edge of the motherboard.

Bus master DMA from a VLB controller will not cause the L2 and L1 caches
to be updated/invalidated unless it is in a master slot.

Not all VLB motherboards have even a single master slot.

Each VLB transfer steals cycles from DRAM refresh.  You can only
steal so many cycles before your system becomes unstable.  Generally,
this is the number of cycles stolen by two slots.


If you disable your L1 and L2 cache and jumper in more wait states, you
can successfully use 2 VLB devices.

But then why bother?


					Terry Lambert
					terry@lambert.org
---
Any opinions in this posting are my own and not those of my present
or previous employers.



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199602262022.NAA02490>