Date: Wed, 1 Mar 2006 11:50:16 -0500 (EST) From: Andrew Gallatin <gallatin@cs.duke.edu> To: Scott Long <scottl@samsco.org> Cc: cvs-src@FreeBSD.org, src-committers@FreeBSD.org, cvs-all@FreeBSD.org, John Baldwin <jhb@FreeBSD.org> Subject: Re: cvs commit: src/sys/amd64/amd64 intr_machdep.c io_apic.c local_apic.c mp_machdep.c src/sys/amd64/include apicvar.h intr_machdep.h src/sys/amd64/isa atpic.c src/sys/i386/i386 intr_machdep.c io_apic.c local_apic.c mp_machdep.c ... Message-ID: <17413.53448.389083.210260@grasshopper.cs.duke.edu> In-Reply-To: <4405CF88.4040904@samsco.org> References: <200602282224.k1SMOtJt070241@repoman.freebsd.org> <200602281735.12240.jhb@freebsd.org> <4404D37E.9040502@samsco.org> <20060301113803.A8330@grasshopper.cs.duke.edu> <4405CF88.4040904@samsco.org>
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Scott Long writes: > Andrew Gallatin wrote: > > > Scott Long [scottl@samsco.org] wrote: > > <...> > > > >> Also, it's not so > >>much important which CPU gets the interrupt as it is which CPU runs the > >>ithread for that interrupt. I guess that you can get a little better > >>latency by preempting directly from the low-level interrupt handler into > >>the ithread, but I don't know if that is noticable noise above the cost > >>of the context switch and inevitable lock operations and contention > >>involved. > > > > > > What do you mean by "preempting directly from the low-level interrupt > > handler into the ithread" ? Do you mean running the ithread directly > > in the context of the hardware interrupt until it does something where > > it needed to block? Do we do this now? > > > > Thanks, > > > > Drew > > > > > > No, I just mean that the CPU running the low-level handler is likely > to schedule and run the ithread as soon as the interrupt exits, > preempting whatever thread happened to be running before the interrupt > occurred. This isn't context stealing, it's just preferential > scheduling. You still need to wind through the scheduler and do a > context switch to get there. Oh, darn. Nevermind :) Drew
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