Date: Sun, 9 Nov 1997 11:44:01 -0700 (MST) From: Charles Mott <cmott@srv.net> To: Alfred Perlstein <perlsta@cs.sunyit.edu> Cc: chat@FreeBSD.ORG Subject: Re: IDT processors? Message-ID: <Pine.BSF.3.96.971109112749.24278B-100000@darkstar.home> In-Reply-To: <Pine.BSF.3.96.971109123631.18731B-100000@server.local.sunyit.edu>
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[moved to -chat from -hackers] On Sun, 9 Nov 1997, Alfred Perlstein wrote: > from what i've heard the IDT chip's FPU is garbage, and it's integer > performance is terrible. This from the IDT data sheet: "The floating-point unit is designed to maximize clock frequency and to minimize chip size while providing adequate levels of floating-point performance for typical desktop use. Some floating-point instructions are pipelined, but some are only partially pipelined." So perhaps Alfred's description of the FPU is on the mark. IDT admits they are targeting the low-end, socket 7 part of the market. Still, most people who have done some digital circuit design take IDT seriously. I wonder if somehow slot-1 is Intel's equivalent of the IBM microchannel bus? Intel's competitor's might be wise to establish an alternate socket spec, basically one with growth capacity to 128 bit data paths. It is now possible for a team of 20 people to design a Pentium clone in two years or less. Intel has an incentive to make their technology as obtuse and complex as possible (just like Mircrosoft has an incentive to continuously add glop to their OS). IDT says in their documentation that they dumped most of the more obscure Intel instructions into slow microcode and basically concetrated on a decent RISC core. Charles Mott [I'm finished with posts on this non-FreeBSD subject]
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