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Date:      Thu, 5 Dec 2013 21:49:41 +0000 (UTC)
From:      Dimitry Andric <dim@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org
Subject:   svn commit: r259011 - stable/9/contrib/llvm/lib/Transforms/InstCombine
Message-ID:  <201312052149.rB5Lnfh5012514@svn.freebsd.org>
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Author: dim
Date: Thu Dec  5 21:49:41 2013
New Revision: 259011
URL: http://svnweb.freebsd.org/changeset/base/259011

Log:
  MFC r255076:
  
  Pull in r189672 from upstream llvm trunk:
  
    InstCombine: Check for zero shift amounts before subtracting one
    causing integer overflow.
  
    PR17026. Also avoid undefined shifts and shift amounts larger than 64
    bits (those are always undef because we can't represent integer types
    that large).
  
  This should fix assertion failures when building the emulators/xmame
  port.
  
  Reported by:	bapt

Modified:
  stable/9/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
Directory Properties:
  stable/9/contrib/llvm/   (props changed)

Modified: stable/9/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
==============================================================================
--- stable/9/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp	Thu Dec  5 21:49:14 2013	(r259010)
+++ stable/9/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp	Thu Dec  5 21:49:41 2013	(r259011)
@@ -845,21 +845,26 @@ Value *InstCombiner::SimplifyDemandedUse
 Value *InstCombiner::SimplifyShrShlDemandedBits(Instruction *Shr,
   Instruction *Shl, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne) {
 
-  unsigned ShlAmt = cast<ConstantInt>(Shl->getOperand(1))->getZExtValue();
-  unsigned ShrAmt = cast<ConstantInt>(Shr->getOperand(1))->getZExtValue();
+  const APInt &ShlOp1 = cast<ConstantInt>(Shl->getOperand(1))->getValue();
+  const APInt &ShrOp1 = cast<ConstantInt>(Shr->getOperand(1))->getValue();
+  if (!ShlOp1 || !ShrOp1)
+      return 0; // Noop.
+
+  Value *VarX = Shr->getOperand(0);
+  Type *Ty = VarX->getType();
+  unsigned BitWidth = Ty->getIntegerBitWidth();
+  if (ShlOp1.uge(BitWidth) || ShrOp1.uge(BitWidth))
+    return 0; // Undef.
+
+  unsigned ShlAmt = ShlOp1.getZExtValue();
+  unsigned ShrAmt = ShrOp1.getZExtValue();
 
   KnownOne.clearAllBits();
   KnownZero = APInt::getBitsSet(KnownZero.getBitWidth(), 0, ShlAmt-1);
   KnownZero &= DemandedMask;
 
-  if (ShlAmt == 0 || ShrAmt == 0)
-    return 0;
-
-  Value *VarX = Shr->getOperand(0);
-  Type *Ty = VarX->getType();
-
-  APInt BitMask1(APInt::getAllOnesValue(Ty->getIntegerBitWidth()));
-  APInt BitMask2(APInt::getAllOnesValue(Ty->getIntegerBitWidth()));
+  APInt BitMask1(APInt::getAllOnesValue(BitWidth));
+  APInt BitMask2(APInt::getAllOnesValue(BitWidth));
 
   bool isLshr = (Shr->getOpcode() == Instruction::LShr);
   BitMask1 = isLshr ? (BitMask1.lshr(ShrAmt) << ShlAmt) :

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