Date: Thu, 05 Aug 2004 21:43:53 -0600 From: Scott Long <scottl@samsco.org> To: John Baldwin <jhb@freebsd.org> Cc: Tim Robbins <tjr@freebsd.org> Subject: Re: Atomic operations on i386/amd64 Message-ID: <4112FE79.4020007@samsco.org> In-Reply-To: <200408051759.53079.jhb@FreeBSD.org> References: <20040805050422.GA41201@cat.robbins.dropbear.id.au> <200408051759.53079.jhb@FreeBSD.org>
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John Baldwin wrote: > On Thursday 05 August 2004 01:04 am, Tim Robbins wrote: > >>Is there any particular reason why atomic_load_acq_*() and >>atomic_store_rel_*() are implemented with CMPXCHG and XCHG instead of >>MOV on i386/amd64 UP? > > > Actually, using mov instead of lock xchg for store_rel reduced performance in > some benchmarks Scott ran on an SMP machine, I'm guessing due to the higher > latency of locks becoming available to other CPUs. I'm still waiting for > benchmark results on UP to see if the change should be made under #ifndef SMP > or some such. > Your patch appears to slightly pessimize UP as well and SMP. Scott
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